[PATCH] D134635: [AMDGPU][GlobalISel] Add Shift/Shufflevector Combine

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp:355-362
+  MachineInstr *ShiftOp = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI);
+  if (ShiftOp->getOpcode() != AMDGPU::G_BITCAST)
+    return false;
+
+  // The bitcast src is a SHUFFLE_VECTOR.
+  ShiftOp = getDefIgnoringCopies(ShiftOp->getOperand(1).getReg(), MRI);
+  if (ShiftOp->getOpcode() != AMDGPU::G_SHUFFLE_VECTOR)
----------------
Pierre-vh wrote:
> arsenm wrote:
> > Should use mi_match
> It doesn't look like there is a `m_GShuffleVector`, do I need to add it myself? I'm not too familiar with MIPatternMatch
Yes. This one is also a bit strange with the shuffle mask operand


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134635/new/

https://reviews.llvm.org/D134635