[PATCH] D134635: [AMDGPU][GlobalISel] Add Shift/Shufflevector Combine

Pierre van Houtryve via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 26 07:23:58 PDT 2022


Pierre-vh added a comment.

I haven't touched the legalization of G_SHUFFLE_VECTOR I think



================
Comment at: llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp:355-362
+  MachineInstr *ShiftOp = getDefIgnoringCopies(MI.getOperand(1).getReg(), MRI);
+  if (ShiftOp->getOpcode() != AMDGPU::G_BITCAST)
+    return false;
+
+  // The bitcast src is a SHUFFLE_VECTOR.
+  ShiftOp = getDefIgnoringCopies(ShiftOp->getOperand(1).getReg(), MRI);
+  if (ShiftOp->getOpcode() != AMDGPU::G_SHUFFLE_VECTOR)
----------------
arsenm wrote:
> Should use mi_match
It doesn't look like there is a `m_GShuffleVector`, do I need to add it myself? I'm not too familiar with MIPatternMatch


Repository:
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  https://reviews.llvm.org/D134635/new/

https://reviews.llvm.org/D134635



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