[PATCH] D134279: [MustExec][LICM] Handle latch being part of an inner cycle (PR57780)

Nikita Popov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 26 06:08:45 PDT 2022


nikic updated this revision to Diff 462883.
nikic retitled this revision from "[MustExec][LICM] Handle latch being part of an irreducible cycle (PR57780)" to "[MustExec][LICM] Handle latch being part of an inner cycle (PR57780)".
nikic edited the summary of this revision.
nikic added a comment.

Rebase over additional tests.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134279/new/

https://reviews.llvm.org/D134279

Files:
  llvm/lib/Analysis/MustExecute.cpp
  llvm/test/Analysis/MustExecute/pr57780.ll
  llvm/test/Transforms/LICM/pr57780.ll


Index: llvm/test/Transforms/LICM/pr57780.ll
===================================================================
--- llvm/test/Transforms/LICM/pr57780.ll
+++ llvm/test/Transforms/LICM/pr57780.ll
@@ -7,7 +7,6 @@
 define void @test() {
 ; CHECK-LABEL: @test(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    store i16 5, ptr @c, align 2
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
 ; CHECK-NEXT:    [[V:%.*]] = phi i32 [ 10, [[ENTRY:%.*]] ], [ 0, [[LOOP_LATCH:%.*]] ]
@@ -16,6 +15,7 @@
 ; CHECK:       loop.cont:
 ; CHECK-NEXT:    br i1 false, label [[LOOP_IRREDUCIBLE:%.*]], label [[LOOP_LATCH]]
 ; CHECK:       loop.irreducible:
+; CHECK-NEXT:    store i16 5, ptr @c, align 2
 ; CHECK-NEXT:    br label [[LOOP_LATCH]]
 ; CHECK:       loop.latch:
 ; CHECK-NEXT:    br i1 false, label [[LOOP_IRREDUCIBLE]], label [[LOOP]]
Index: llvm/test/Analysis/MustExecute/pr57780.ll
===================================================================
--- llvm/test/Analysis/MustExecute/pr57780.ll
+++ llvm/test/Analysis/MustExecute/pr57780.ll
@@ -2,9 +2,8 @@
 
 @c = global i16 0, align 2
 
-; FIXME: miscompile
 ; CHECK-LABEL: define void @latch_cycle_irreducible
-; CHECK: store i16 5, ptr @c, align 2 ; (mustexec in: loop)
+; CHECK: store i16 5, ptr @c, align 2{{$}}
 define void @latch_cycle_irreducible() {
 entry:
   br label %loop
@@ -28,9 +27,8 @@
   ret void
 }
 
-; FIXME: miscompile
 ; CHECK-LABEL: define void @latch_cycle_reducible
-; CHECK: store i16 5, ptr @c, align 2 ; (mustexec in: loop)
+; CHECK: store i16 5, ptr @c, align 2{{$}}
 define void @latch_cycle_reducible() {
 entry:
   br label %loop
Index: llvm/lib/Analysis/MustExecute.cpp
===================================================================
--- llvm/lib/Analysis/MustExecute.cpp
+++ llvm/lib/Analysis/MustExecute.cpp
@@ -201,6 +201,13 @@
   SmallPtrSet<const BasicBlock *, 4> Predecessors;
   collectTransitivePredecessors(CurLoop, BB, Predecessors);
 
+  // Bail out if the latch block is part of the predecessor set. In this case
+  // we may take the backedge to the header and not execute other latch
+  // successors.
+  for (const BasicBlock *Pred : predecessors(CurLoop->getHeader()))
+    if (Predecessors.contains(Pred))
+      return false;
+
   // Make sure that all successors of, all predecessors of BB which are not
   // dominated by BB, are either:
   // 1) BB,


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