[PATCH] D133861: [AMDGPU][MC][NFC] Refactor AMDGPUAsmParser::validateVOPLiteral

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8bb5c8920581: [AMDGPU][MC][NFC] Refactor AMDGPUAsmParser::validateVOPLiteral (authored by dp).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133861/new/

https://reviews.llvm.org/D133861

Files:
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp


Index: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -1662,6 +1662,7 @@
   bool validateVccOperand(unsigned Reg) const;
   bool validateVOPLiteral(const MCInst &Inst, const OperandVector &Operands);
   bool validateMAIAccWrite(const MCInst &Inst, const OperandVector &Operands);
+  bool validateMAISrc2(const MCInst &Inst, const OperandVector &Operands);
   bool validateMFMA(const MCInst &Inst, const OperandVector &Operands);
   bool validateAGPRLdSt(const MCInst &Inst) const;
   bool validateVGPRAlign(const MCInst &Inst) const;
@@ -3807,6 +3808,28 @@
   return true;
 }
 
+bool AMDGPUAsmParser::validateMAISrc2(const MCInst &Inst,
+                                      const OperandVector &Operands) {
+  unsigned Opcode = Inst.getOpcode();
+  const MCInstrDesc &Desc = MII.get(Opcode);
+
+  if (!(Desc.TSFlags & SIInstrFlags::IsMAI) ||
+      !getFeatureBits()[FeatureMFMAInlineLiteralBug])
+    return true;
+
+  const int Src2Idx = getNamedOperandIdx(Opcode, OpName::src2);
+  if (Src2Idx == -1)
+    return true;
+
+  if (Inst.getOperand(Src2Idx).isImm() && isInlineConstant(Inst, Src2Idx)) {
+    Error(getConstLoc(Operands),
+          "inline constants are not allowed for this operand");
+    return false;
+  }
+
+  return true;
+}
+
 bool AMDGPUAsmParser::validateMFMA(const MCInst &Inst,
                                    const OperandVector &Operands) {
   const unsigned Opc = Inst.getOpcode();
@@ -4287,13 +4310,6 @@
     if (!AMDGPU::isSISrcOperand(Desc, OpIdx))
       continue;
 
-    if (OpIdx == Src2Idx && (Desc.TSFlags & SIInstrFlags::IsMAI) &&
-        getFeatureBits()[AMDGPU::FeatureMFMAInlineLiteralBug]) {
-      Error(getConstLoc(Operands),
-            "inline constants are not allowed for this operand");
-      return false;
-    }
-
     if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) {
       uint32_t Value = static_cast<uint32_t>(MO.getImm());
       if (NumLiterals == 0 || LiteralValue != Value) {
@@ -4645,6 +4661,9 @@
   if (!validateMAIAccWrite(Inst, Operands)) {
     return false;
   }
+  if (!validateMAISrc2(Inst, Operands)) {
+    return false;
+  }
   if (!validateMFMA(Inst, Operands)) {
     return false;
   }


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