[PATCH] D133723: [AMDGPU][GFX11] Use VGPR_32_F128 for VOP1,2,C

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:928
+    (f32 (f16_to_fp i32:$src0)),
+    (cvt32to16_e64 SRCMODS.NONE, $src0)
+  >;
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The names `cvt16to32_e64` and `cvt32to16_e64` are misleading. They should be the other way around.


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Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:987
+let SubtargetPredicate = HasTrue16BitInsts in
+defm : f16_fp_Pats<V_CVT_F16_F32_T16_e64, V_CVT_F32_F16_T16_e64>;
 
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Why are these patterns special? `_E64` variants have no VGPR limitations. Is this required for future changes?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133723/new/

https://reviews.llvm.org/D133723