[PATCH] D133723: [AMDGPU][GFX11] Use VGPR_32_F128 for VOP1,2,C

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.td:557
+
+def VGPR_32_F128 : SIRegisterClass<"AMDGPU", !listconcat(Reg32Types.types, Reg16Types.types), 32,
+                            (add (sequence "VGPR%u", 0, 127))> {
----------------
Joe_Nash wrote:
> arsenm wrote:
> > I don't know what "_F128" is supposed to mean. I read this as a class for long double
> It is short for First 128. Is a set with only the first 128 VGPRs. I will add a comment noting this. 
Lo128 would probably be more consistent terminology over "first"


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Comment at: llvm/lib/Target/AMDGPU/VOP3Instructions.td:928
 defm V_CVT_PK_U16_F32      : VOP3_Realtriple_gfx11<0x307>;
-defm V_MAX_U16             : VOP3Only_Realtriple_gfx11<0x309>;
-defm V_MAX_I16             : VOP3Only_Realtriple_gfx11<0x30a>;
-defm V_MIN_U16             : VOP3Only_Realtriple_gfx11<0x30b>;
-defm V_MIN_I16             : VOP3Only_Realtriple_gfx11<0x30c>;
+defm V_MAX_U16_T16         : VOP3Only_Realtriple_T16_gfx11<0x309, "v_max_u16">;
+defm V_MAX_I16_T16         : VOP3Only_Realtriple_T16_gfx11<0x30a, "v_max_i16">;
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Since the _T16 doesn't appear in the instruction mnemonic it should be lowercased


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  https://reviews.llvm.org/D133723/new/

https://reviews.llvm.org/D133723