[PATCH] D133787: [AMDGPU][SILoadStoreOptimizer] Merge SGPR_IMM scalar buffer loads.

[Ivan Kosarev via Phabricator via llvm-commits]

kosarev marked an inline comment as done.
kosarev added a comment.

In D133787#3788908 <https://reviews.llvm.org/D133787#3788908>, @foad wrote:

> I can't resist pointing out that this patch would be simpler if we never used the _SGPR form on subtargets where the _SGPR_IMM form is available.

True, the implementation would be a bit simpler. I don't mind it either way, it's just that a slightly simpler implementation doesn't necessarily work as an obviously sufficient argument when it comes to user-faced things. I guess some wider discussion might help here.



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Comment at: llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:1388
+  // zero-offset load, we generate its SGPR variant.
+  if (AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::offset) != -1)
+    New.addImm(MergedOffset);
----------------
Also changed this line to what looks to me a more reliable implementation.


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https://reviews.llvm.org/D133787