[llvm] 0404aaf - AMDGPU: Factor out hasDivergentBranch(). NFC

[Ruiling Song via llvm-commits]

Author: Ruiling Song
Date: 2022-09-14T13:27:21+08:00
New Revision: 0404aafbe3ddcd08590d4d593b90051a8bee6e09

URL: https://github.com/llvm/llvm-project/commit/0404aafbe3ddcd08590d4d593b90051a8bee6e09
DIFF: https://github.com/llvm/llvm-project/commit/0404aafbe3ddcd08590d4d593b90051a8bee6e09.diff

LOG: AMDGPU: Factor out hasDivergentBranch(). NFC

This is helpful for detecting whether a block ends with divergent branch
in passes before lowering the pseudo control flow instructions.

Differential Revision: https://reviews.llvm.org/D133184

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    llvm/lib/Target/AMDGPU/SIInstrInfo.h
    llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 4ee17cd4e8dbf..6032ae86807a8 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -2379,6 +2379,16 @@ MachineBasicBlock *SIInstrInfo::getBranchDestBlock(
   return MI.getOperand(0).getMBB();
 }
 
+bool SIInstrInfo::hasDivergentBranch(const MachineBasicBlock *MBB) const {
+  for (const MachineInstr &MI : MBB->terminators()) {
+    if (MI.getOpcode() == AMDGPU::SI_NON_UNIFORM_BRCOND_PSEUDO ||
+        MI.getOpcode() == AMDGPU::SI_IF || MI.getOpcode() == AMDGPU::SI_ELSE ||
+        MI.getOpcode() == AMDGPU::SI_LOOP)
+      return true;
+  }
+  return false;
+}
+
 void SIInstrInfo::insertIndirectBranch(MachineBasicBlock &MBB,
                                        MachineBasicBlock &DestBB,
                                        MachineBasicBlock &RestoreBB,

diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 5840f45bdc5ab..2b2b4d0ce91f4 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -277,6 +277,10 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
 
   MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override;
 
+  /// Return whether the block terminate with divergent branch.
+  /// Note this only work before lowering the pseudo control flow instructions.
+  bool hasDivergentBranch(const MachineBasicBlock *MBB) const;
+
   void insertIndirectBranch(MachineBasicBlock &MBB,
                             MachineBasicBlock &NewDestBB,
                             MachineBasicBlock &RestoreBB, const DebugLoc &DL,

diff  --git a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
index 5fb545b50228a..d4f0906f020ab 100644
--- a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+++ b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
@@ -124,6 +124,7 @@ class SILowerI1Copies : public MachineFunctionPass {
 ///
 class PhiIncomingAnalysis {
   MachinePostDominatorTree &PDT;
+  const SIInstrInfo *TII;
 
   // For each reachable basic block, whether it is a source in the induced
   // subgraph of the CFG.
@@ -133,7 +134,8 @@ class PhiIncomingAnalysis {
   SmallVector<MachineBasicBlock *, 4> Predecessors;
 
 public:
-  PhiIncomingAnalysis(MachinePostDominatorTree &PDT) : PDT(PDT) {}
+  PhiIncomingAnalysis(MachinePostDominatorTree &PDT, const SIInstrInfo *TII)
+      : PDT(PDT), TII(TII) {}
 
   /// Returns whether \p MBB is a source in the induced subgraph of reachable
   /// blocks.
@@ -166,18 +168,7 @@ class PhiIncomingAnalysis {
 
       // If this block has a divergent terminator and the def block is its
       // post-dominator, the wave may first visit the other successors.
-      bool Divergent = false;
-      for (MachineInstr &MI : MBB->terminators()) {
-        if (MI.getOpcode() == AMDGPU::SI_NON_UNIFORM_BRCOND_PSEUDO ||
-            MI.getOpcode() == AMDGPU::SI_IF ||
-            MI.getOpcode() == AMDGPU::SI_ELSE ||
-            MI.getOpcode() == AMDGPU::SI_LOOP) {
-          Divergent = true;
-          break;
-        }
-      }
-
-      if (Divergent && PDT.dominates(&DefBlock, MBB))
+      if (TII->hasDivergentBranch(MBB) && PDT.dominates(&DefBlock, MBB))
         append_range(Stack, MBB->successors());
     }
 
@@ -541,7 +532,7 @@ bool SILowerI1Copies::lowerCopiesFromI1() {
 bool SILowerI1Copies::lowerPhis() {
   MachineSSAUpdater SSAUpdater(*MF);
   LoopFinder LF(*DT, *PDT);
-  PhiIncomingAnalysis PIA(*PDT);
+  PhiIncomingAnalysis PIA(*PDT, TII);
   SmallVector<MachineInstr *, 4> Vreg1Phis;
   SmallVector<MachineBasicBlock *, 4> IncomingBlocks;
   SmallVector<unsigned, 4> IncomingRegs;