[PATCH] D133810: [RISCV\ Verify consistency of a couple TSFlags related to vector operands

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 13 15:26:25 PDT 2022


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:1229
+  if (RISCVII::hasVecPolicyOp(TSFlags) && !RISCVII::hasVLOp(TSFlags)) {
+    ErrInfo = "policy operand w/o SEW operand?";
+    return false;
----------------
SEW -> VL


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133810/new/

https://reviews.llvm.org/D133810



More information about the llvm-commits mailing list