[llvm] 9d8c320 - llvm-reduce: Fix missing undef flags in some tests

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2022-09-13T18:10:56-04:00
New Revision: 9d8c320cd78278f2ac265e7c62b4bd1e88363a38

URL: https://github.com/llvm/llvm-project/commit/9d8c320cd78278f2ac265e7c62b4bd1e88363a38
DIFF: https://github.com/llvm/llvm-project/commit/9d8c320cd78278f2ac265e7c62b4bd1e88363a38.diff

LOG: llvm-reduce: Fix missing undef flags in some tests

These caused failures when LiveIntervals is used by the verifier. Also
fix some other errors that appear with subranges enabled.

Added: 
    

Modified: 
    llvm/test/tools/llvm-reduce/mir/reduce-register-defs.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/tools/llvm-reduce/mir/reduce-register-defs.mir b/llvm/test/tools/llvm-reduce/mir/reduce-register-defs.mir
index ff039ee1a2e1..6fb9d5f3e524 100644
--- a/llvm/test/tools/llvm-reduce/mir/reduce-register-defs.mir
+++ b/llvm/test/tools/llvm-reduce/mir/reduce-register-defs.mir
@@ -32,7 +32,8 @@ body:             |
 # ALL-LABEL: name: subreg_def
 # CHECK-INTERESTINGNESS0: %super.sub0
 
-# RESULT0: undef %super.sub1:vreg_64 = IMPLICIT_DEF
+# RESULT0: undef %super.sub0:vreg_64 = IMPLICIT_DEF
+# RESULT0-NEXT: %super.sub1:vreg_64 = IMPLICIT_DEF
 ---
 name: subreg_def
 tracksRegLiveness: true
@@ -42,7 +43,8 @@ body:             |
 
     %vgpr0:vgpr_32 = COPY $vgpr0
     %vgpr1:vgpr_32 = COPY $vgpr1
-    undef %super.sub1:vreg_64 = V_ADD_F32_e32 %vgpr0, %vgpr1, implicit $mode, implicit $exec
+    undef %super.sub0:vreg_64 = IMPLICIT_DEF
+    %super.sub1:vreg_64 = V_ADD_F32_e32 %vgpr0, %vgpr1, implicit $mode, implicit $exec
 
     S_NOP 0, implicit %super.sub0
     S_ENDPGM 0, implicit %super.sub0
@@ -92,8 +94,8 @@ body:             |
 # ALL-LABEL: name: multi_def_subreg
 # CHECK-INTERESTINGNESS0: S_NOP 4
 
-# RESULT0: %redef.sub0:vreg_64 = IMPLICIT_DEF
-# RESULT0: %redef.sub1:vreg_64 = IMPLICIT_DEF
+# RESULT0: undef %redef.sub0:vreg_64 = IMPLICIT_DEF
+# RESULT0: undef %redef.sub1:vreg_64 = IMPLICIT_DEF
 ---
 name: multi_def_subreg
 tracksRegLiveness: true
@@ -103,7 +105,7 @@ body:             |
 
     %vgpr0:vgpr_32 = COPY $vgpr0
     %vgpr1:vgpr_32 = COPY $vgpr1
-    S_NOP 3, implicit-def %redef.sub0:vreg_64, implicit-def %redef.sub1:vreg_64
+    S_NOP 3, undef implicit-def %redef.sub0:vreg_64, undef implicit-def %redef.sub1:vreg_64
     S_NOP 4, implicit %redef
 ...
 
@@ -111,7 +113,7 @@ body:             |
 # CHECK-INTERESTINGNESS0: S_NOP 4
 
 # RESULT0-NOT: implicit-def %redef
-# RESULT0: %redef.sub0:vreg_64 = IMPLICIT_DEF
+# RESULT0: undef %redef.sub0:vreg_64 = IMPLICIT_DEF
 # RESULT0-NOT: implicit-def %redef
 ---
 name: multi_def_subreg_same_subreg
@@ -122,14 +124,14 @@ body:             |
 
     %vgpr0:vgpr_32 = COPY $vgpr0
     %vgpr1:vgpr_32 = COPY $vgpr1
-    S_NOP 3, implicit-def %redef.sub0:vreg_64, implicit-def %redef.sub0:vreg_64
+    S_NOP 3, undef implicit-def %redef.sub0:vreg_64, undef implicit-def %redef.sub0:vreg_64
     S_NOP 4, implicit %redef
 ...
 
 # ALL-LABEL: name: tied_def
 # CHECK-INTERESTINGNESS0: V_MAC_F32
 
-# RESULT0: %mac0:vgpr_32 = V_MAC_F32_e32 %vgpr0, %vgpr1, %mac0, implicit $mode, implicit $exec
+# RESULT0: %mac0:vgpr_32 = V_MAC_F32_e32 %vgpr0, %vgpr1, undef %mac0, implicit $mode, implicit $exec
 # RESULT0: %mac1:vgpr_32 = IMPLICIT_DEF
 ---
 name: tied_def
@@ -141,7 +143,7 @@ body:             |
     S_WAITCNT 0
     %vgpr0:vgpr_32 = COPY $vgpr0
     %vgpr1:vgpr_32 = COPY $vgpr1
-    %mac0:vgpr_32 = V_MAC_F32_e32 %vgpr0, %vgpr1, %mac0, implicit $mode, implicit $exec
+    %mac0:vgpr_32 = V_MAC_F32_e32 %vgpr0, %vgpr1, undef %mac0, implicit $mode, implicit $exec
     %mac1:vgpr_32 = V_MAC_F32_e32 %vgpr1, %vgpr0, %mac0, implicit $mode, implicit $exec
     S_ENDPGM 0, implicit %mac0, implicit %mac1
 ...