[PATCH] D133690: [VP][RISCV] Add vp.fsqrt intrinsic and RISC-V support.

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 12 11:49:22 PDT 2022


reames added a comment.

LGTM, but I'm still a bit unclear on this code, so please wait until someone else (e.g @craig.topper) has a chance to take a look.



================
Comment at: llvm/docs/LangRef.rst:19221
+(:ref:`sqrt <int_sqrt>`) of the first vector operand on each enabled lane.  The
+result on disabled lanes is undefined.
+
----------------
Can you be more explicit here about the result being undefined, not the behavior?  i.e. that masked off lanes won't fault, etc..


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