[PATCH] D133688: [RISCV] Lower BUILD_VECTOR to RISCVISD::VID_VL if it is floating-point type.

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

High level question - why approach this as checking to see if the float is representable as an integer instead of just using the bit-pattern of the float?  Using the bit-pattern would seem to match the vid sequence with a large base offset.  If so, we could either emit the base as a constant, or leverage the float to int conversion if within the sequence is in the representable range.


Repository:
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  https://reviews.llvm.org/D133688/new/

https://reviews.llvm.org/D133688