[PATCH] D133580: [VPlan] Only generate single instr for unpredicated stores of varying value to invariant address

[Ayal Zaks via Phabricator via llvm-commits]

Ayal added inline comments.


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Comment at: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:9666
+  // A store of a loop varying value to a loop invariant address only
+  // needs a single copy of the store.
+  if (isa<StoreInst>(UI) && !getOperand(1)->getDef()) {
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@reames , @fhahn - rather than detect individual redundant instances at this late stage to suppress their code-gen, would be better to record such uniformity earlier in VPlan - thereby potentially facilitating the detection of additional redundancies, improving cost estimation, and simplifying code-gen?


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Comment at: llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll:89
 ; CHECK: %[[ICMP:.*]] = icmp eq <64 x i64*> %[[GEP]], %[[SPLAT:.*]]
-; CHECK: %[[EXTRACT1:.*]] = extractelement <64 x i1> %[[ICMP]], i32 0
+; CHECK: %[[EXTRACT1:.*]] = extractelement <64 x i1> %[[ICMP]], i32 63
 ; CHECK: store i1 %[[EXTRACT1]], i1* %dst
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(Just noting that this is a somewhat odd test, original CHECK was missing the final store of element 63 presumably.)


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Comment at: llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll:50
 ; CHECK-NEXT:    store i32 0, i32* @f.e, align 1, !alias.scope !0, !noalias !3
-; CHECK-NEXT:    store i32 0, i32* @f.e, align 1, !alias.scope !0, !noalias !3
 ; CHECK-NEXT:    store i8 10, i8* [[TMP0]], align 1
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Should this have been caught earlier by IsUniform?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D133580/new/

https://reviews.llvm.org/D133580