[PATCH] D133408: [LegalizeTypes][LegalizeDAG] Use misaligned load/store to optimize memory access with non-power2 integer types.

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 updated this revision to Diff 458946.
bcl5980 added a comment.

Update load+store patterns with integers larger than 56 bits. Looks even worse than 56bits.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133408/new/

https://reviews.llvm.org/D133408

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/test/CodeGen/AArch64/arm64-non-pow2-ldst.ll
  llvm/test/CodeGen/X86/funnel-shift.ll
  llvm/test/CodeGen/X86/illegal-bitfield-loadstore.ll
  llvm/test/CodeGen/X86/shrink-compare-pgso.ll
  llvm/test/CodeGen/X86/shrink-compare.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D133408.458946.patch
Type: text/x-patch
Size: 25974 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220909/2e36baf7/attachment.bin>