[PATCH] D133169: [AMDGPU] Constrain src0 RC of 64 bit shift amount on gfx90a

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 8 15:26:14 PDT 2022


rampitec added a comment.

Now the w/a in the hazard recognizer is submitted, do we need this as well? The w/a in the recognizer produces quite heavy code, this can reduce chances of it to minimum. Although this may also increase register pressure.


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  https://reviews.llvm.org/D133169/new/

https://reviews.llvm.org/D133169



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