[PATCH] D133464: [WIP][BPF] Add sext load instructions

[Andrii Nakryiko via Phabricator via llvm-commits]

anakryiko added inline comments.


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Comment at: llvm/lib/Target/BPF/BPFInstrInfo.td:469
+  def LDHS : LOADi64<BPF_H, BPF_MEM_SEXT, "s16", sextloadi16>;
+  def LDBS : LOADi64<BPF_B, BPF_MEM_SEXT, "s8",  sextloadi8>;
 }
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ast wrote:
> I believe x86 and arm64 have instructions that sign extends one register into another,
> but not insns that sign extend during the load.
> Such insns can be composed better to in case s32 came as a return value from a call.
> Have you considered going that route?
one of the motivations for this instruction was to allow libbpf to automatically change load instruction to a proper size of the field (https://github.com/libbpf/libbpf/blob/master/src/relo_core.c#L930-L940). This works currently only for unsigned fields. If we add some instruction which would have to be called after load, that will not help in this case. So maybe let's add both? Register-to-register would help with calls, load with sign extension will help CO-RE and generally signed loads?


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  https://reviews.llvm.org/D133464/new/

https://reviews.llvm.org/D133464