[PATCH] D133466: [PowerPC] Remove redundant spill/reload of callee saved vector registers

[Kai Luo via Phabricator via llvm-commits]

lkail added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll:19
 ; CHECK-VEXT: name: spill
 ; CHECK-VEXT: spill-slot
 define void @spill() {
----------------
Please include all spill slot information for each register.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133466/new/

https://reviews.llvm.org/D133466