[PATCH] D133466: [PowerPC] Remove redundant spill/reload of callee saved vector registers
Ting Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 7 18:39:46 PDT 2022
tingwang created this revision.
tingwang added reviewers: lkail, nemanjai, shchenz, PowerPC.
tingwang added a project: LLVM.
Herald added subscribers: kbarton, hiraditya, qcolombet.
Herald added a project: All.
tingwang requested review of this revision.
Herald added a subscriber: llvm-commits.
This is AIX part of update after https://reviews.llvm.org/D117225
Fixed the issue that AIX64 with vector pair enabled saw redundant spill/reload of callee saved vector registers.
Based on original patch by: Kai Luo
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D133466
Files:
llvm/lib/Target/PowerPC/PPCCallingConv.td
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/test/CodeGen/PowerPC/aix32-vector-pair-cc-spills.ll
llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll
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