[llvm] 63335af - [ARM64EC 2/?] Add target triple, and allow targeting it.

[Eli Friedman via llvm-commits]

Author: Eli Friedman
Date: 2022-09-05T12:27:10-07:00
New Revision: 63335afb4ebaabc1f983b1f1dbb07816ef4f288f

URL: https://github.com/llvm/llvm-project/commit/63335afb4ebaabc1f983b1f1dbb07816ef4f288f
DIFF: https://github.com/llvm/llvm-project/commit/63335afb4ebaabc1f983b1f1dbb07816ef4f288f.diff

LOG: [ARM64EC 2/?] Add target triple, and allow targeting it.

Part of patchset to add initial support for ARM64EC.

Per discussion on review, using the triple arm64ec-pc-windows-msvc. The
parsing works the same way as Apple's alternate Arm ABI "arm64e".

Differential Revision: https://reviews.llvm.org/D125412

Added: 
    llvm/test/MC/AArch64/arm64ec.s

Modified: 
    llvm/include/llvm/ADT/Triple.h
    llvm/lib/Support/Triple.cpp
    llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
    llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
    llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/ADT/Triple.h b/llvm/include/llvm/ADT/Triple.h
index bd1a3acdf740a..db4d9c93e0fe9 100644
--- a/llvm/include/llvm/ADT/Triple.h
+++ b/llvm/include/llvm/ADT/Triple.h
@@ -142,6 +142,7 @@ class Triple {
     ARMSubArch_v4t,
 
     AArch64SubArch_arm64e,
+    AArch64SubArch_arm64ec,
 
     KalimbaSubArch_v3,
     KalimbaSubArch_v4,
@@ -583,6 +584,12 @@ class Triple {
            (isOSWindows() && getEnvironment() == Triple::UnknownEnvironment);
   }
 
+  // Checks if we're using the Windows Arm64EC ABI.
+  bool isWindowsArm64EC() const {
+    return getArch() == Triple::aarch64 &&
+           getSubArch() == Triple::AArch64SubArch_arm64ec;
+  }
+
   bool isWindowsCoreCLREnvironment() const {
     return isOSWindows() && getEnvironment() == Triple::CoreCLR;
   }

diff  --git a/llvm/lib/Support/Triple.cpp b/llvm/lib/Support/Triple.cpp
index 3766f265223a2..33416fc62d495 100644
--- a/llvm/lib/Support/Triple.cpp
+++ b/llvm/lib/Support/Triple.cpp
@@ -458,6 +458,7 @@ static Triple::ArchType parseArch(StringRef ArchName) {
     .Case("arm64", Triple::aarch64)
     .Case("arm64_32", Triple::aarch64_32)
     .Case("arm64e", Triple::aarch64)
+    .Case("arm64ec", Triple::aarch64)
     .Case("arm", Triple::arm)
     .Case("armeb", Triple::armeb)
     .Case("thumb", Triple::thumb)
@@ -656,6 +657,9 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
   if (SubArchName == "arm64e")
     return Triple::AArch64SubArch_arm64e;
 
+  if (SubArchName == "arm64ec")
+    return Triple::AArch64SubArch_arm64ec;
+
   if (SubArchName.startswith("spirv"))
     return StringSwitch<Triple::SubArchType>(SubArchName)
         .EndsWith("v1.0", Triple::SPIRVSubArch_v10)

diff  --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index e4b547e17f64c..fb6c5af8f5fa3 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -745,7 +745,7 @@ class COFFAArch64AsmBackend : public AArch64AsmBackend {
 
   std::unique_ptr<MCObjectTargetWriter>
   createObjectTargetWriter() const override {
-    return createAArch64WinCOFFObjectWriter();
+    return createAArch64WinCOFFObjectWriter(TheTriple);
   }
 };
 }

diff  --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
index 049c49796dc65..7daf08499945b 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
@@ -33,6 +33,7 @@ class MCSubtargetInfo;
 class MCTargetOptions;
 class MCTargetStreamer;
 class Target;
+class Triple;
 
 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
                                           MCContext &Ctx);
@@ -52,7 +53,8 @@ std::unique_ptr<MCObjectTargetWriter>
 createAArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype,
                               bool IsILP32);
 
-std::unique_ptr<MCObjectTargetWriter> createAArch64WinCOFFObjectWriter();
+std::unique_ptr<MCObjectTargetWriter>
+createAArch64WinCOFFObjectWriter(const Triple &TheTriple);
 
 MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S,
                                                  formatted_raw_ostream &OS,

diff  --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
index 46ffa50b3e6ec..05c7d76f0af35 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
@@ -30,8 +30,10 @@ namespace {
 
 class AArch64WinCOFFObjectWriter : public MCWinCOFFObjectTargetWriter {
 public:
-  AArch64WinCOFFObjectWriter()
-      : MCWinCOFFObjectTargetWriter(COFF::IMAGE_FILE_MACHINE_ARM64) {}
+  AArch64WinCOFFObjectWriter(const Triple &TheTriple)
+      : MCWinCOFFObjectTargetWriter(TheTriple.isWindowsArm64EC()
+                                        ? COFF::IMAGE_FILE_MACHINE_ARM64EC
+                                        : COFF::IMAGE_FILE_MACHINE_ARM64) {}
 
   ~AArch64WinCOFFObjectWriter() override = default;
 
@@ -159,6 +161,7 @@ bool AArch64WinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
   return true;
 }
 
-std::unique_ptr<MCObjectTargetWriter> llvm::createAArch64WinCOFFObjectWriter() {
-  return std::make_unique<AArch64WinCOFFObjectWriter>();
+std::unique_ptr<MCObjectTargetWriter>
+llvm::createAArch64WinCOFFObjectWriter(const Triple &TheTriple) {
+  return std::make_unique<AArch64WinCOFFObjectWriter>(TheTriple);
 }

diff  --git a/llvm/test/MC/AArch64/arm64ec.s b/llvm/test/MC/AArch64/arm64ec.s
new file mode 100644
index 0000000000000..e6ac6bd721a7b
--- /dev/null
+++ b/llvm/test/MC/AArch64/arm64ec.s
@@ -0,0 +1,4 @@
+// RUN: llvm-mc -triple arm64ec-pc-windows-msvc -filetype=obj %s -o - | llvm-objdump -d -r - | FileCheck %s
+// CHECK: file format coff-arm64ec
+// CHECK: add x0, x1, x2
+add x0, x1, x2