[PATCH] D133255: [RISCV] Transform VMERGE_VVM_<LMUL>_TU with all ones mask to VADD_VI_<LMUL>_TU.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2509
+// Return true if we can make sure mask of N is all-ones mask.
+static bool useAllOnesMask(SDNode *N, unsigned MaskOpIdx) {
   // Check that we're using V0 as a mask register.
----------------
use -> uses?


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Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2718
+// Transform (VMERGE_VVM_<LMUL>_TU false, false, true, allones, vl, sew) to
+// (VADD_VI_<LMUL>_TU false, true, 0, vl, sew). It may decrase uses of VMSET.
+bool RISCVDAGToDAGISel::performVMergeToVAdd(SDNode *N) {
----------------
decrase -> decrease


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Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2721
+  // Check merge operand is same as false operand.
+  if (N->getOperand(0) != N->getOperand(1))
+    return false;
----------------
Should we move this check and `useAllOnesMask` up to the caller? They are common to performVMergeToVAdd and performCombineVMergeAndVOps.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133255/new/

https://reviews.llvm.org/D133255