[llvm] 6941b1f - [CostModel][X86] Add CostKinds to SSE42 fadd/fsub/fneg ops

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-09-02T16:32:44+01:00
New Revision: 6941b1f6c129011bd6c9e8a4683a7fc6633bae32

URL: https://github.com/llvm/llvm-project/commit/6941b1f6c129011bd6c9e8a4683a7fc6633bae32
DIFF: https://github.com/llvm/llvm-project/commit/6941b1f6c129011bd6c9e8a4683a7fc6633bae32.diff

LOG: [CostModel][X86] Add CostKinds to SSE42 fadd/fsub/fneg ops

These were missed in an earlier commit, the latency/codesize/size-latency numbers aren't different from the SSE2 values that it was falling through to, hence no test change, but it did mean we were wasting a lookup.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86TargetTransformInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index a1a1b65f2b2c..359e7106c6de 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -1016,15 +1016,15 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost(
         return LT.first * KindCost.value();
 
   static const CostKindTblEntry SSE42CostTable[] = {
-    { ISD::FADD, MVT::f64,    {  1 } }, // Nehalem from http://www.agner.org/
-    { ISD::FADD, MVT::f32,    {  1 } }, // Nehalem from http://www.agner.org/
-    { ISD::FADD, MVT::v2f64,  {  1 } }, // Nehalem from http://www.agner.org/
-    { ISD::FADD, MVT::v4f32,  {  1 } }, // Nehalem from http://www.agner.org/
-
-    { ISD::FSUB, MVT::f64,    {  1 } }, // Nehalem from http://www.agner.org/
-    { ISD::FSUB, MVT::f32 ,   {  1 } }, // Nehalem from http://www.agner.org/
-    { ISD::FSUB, MVT::v2f64,  {  1 } }, // Nehalem from http://www.agner.org/
-    { ISD::FSUB, MVT::v4f32,  {  1 } }, // Nehalem from http://www.agner.org/
+    { ISD::FADD, MVT::f64,    {  1,  3, 1, 1 } }, // Nehalem from http://www.agner.org/
+    { ISD::FADD, MVT::f32,    {  1,  3, 1, 1 } }, // Nehalem from http://www.agner.org/
+    { ISD::FADD, MVT::v2f64,  {  1,  3, 1, 1 } }, // Nehalem from http://www.agner.org/
+    { ISD::FADD, MVT::v4f32,  {  1,  3, 1, 1 } }, // Nehalem from http://www.agner.org/
+
+    { ISD::FSUB, MVT::f64,    {  1,  3, 1, 1 } }, // Nehalem from http://www.agner.org/
+    { ISD::FSUB, MVT::f32 ,   {  1,  3, 1, 1 } }, // Nehalem from http://www.agner.org/
+    { ISD::FSUB, MVT::v2f64,  {  1,  3, 1, 1 } }, // Nehalem from http://www.agner.org/
+    { ISD::FSUB, MVT::v4f32,  {  1,  3, 1, 1 } }, // Nehalem from http://www.agner.org/
 
     { ISD::FMUL, MVT::f64,    {  1 } }, // Nehalem from http://www.agner.org/
     { ISD::FMUL, MVT::f32,    {  1 } }, // Nehalem from http://www.agner.org/