[PATCH] D133078: [X86][NFC] Refine load/store reg to StackSlot for extensibility
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 31 18:43:54 PDT 2022
pengfei added inline comments.
================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:3615
+ X86::FR16XRegClass.hasSubClassEq(RC))
+ return getLoadStoreOpcodeForFP16s(load, STI);
llvm_unreachable("Unknown 4-byte regclass");
----------------
I think we don't need an extra function. Just like line 3591-3598.
================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:3859-3866
- } else if ((RC->getID() == X86::FR16RegClassID ||
- RC->getID() == X86::FR16XRegClassID) &&
- !Subtarget.hasFP16()) {
- unsigned Opc = Subtarget.hasAVX512() ? X86::VMOVSSZmr
- : Subtarget.hasAVX() ? X86::VMOVSSmr
- : X86::MOVSSmr;
- addFrameReference(BuildMI(MBB, MI, DebugLoc(), get(Opc)), FrameIdx)
----------------
pengfei wrote:
> Where's this code?
I understood the change now.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D133078/new/
https://reviews.llvm.org/D133078
More information about the llvm-commits
mailing list