[PATCH] D122918: [RISCV][CodeGen] Support Zfinx, Zdinx, Zhinx, Zhinxmin codegen

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoD.td:105
+let Predicates = [HasStdExtZdinx, IsRV32], DecoderNamespace="RV32Zdinx" in {
+def FLD_IN32X : FPLoad_r<0b011, "ld", FPR64IN32X, WriteFLD64>;
+
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Is this something that should have been in the MC layer patch?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122918/new/

https://reviews.llvm.org/D122918