[PATCH] D132957: [AMDGPU][MC][GFX11][NFC] Update tests for VOP3P.DPP instructions

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp added a comment.

> When using DPP with VOP3P, OPSEL has to be set to all 0 and OPSEL_HI has to be set to all 1

Does it mean that DPP variants of `fma_mix` opcodes are encoded incorrectly? Both llvm and SP3 assemblers do not set `op_sel_hi` to all 1:

  v_fma_mix_f32 v255, v1, v2, v3 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xff,0x00,0x20,0xcc,0xe9,0x04,0x0e,0x04,0x01,0x77,0x39,0x05]
  
  encoding: VOP3P.DPP8
    clamp             0
    encoding       0xcc
    fi8            0x01
    lane_sel_0     0x07
    lane_sel_1     0x06
    lane_sel_2     0x05
    lane_sel_3     0x04
    lane_sel_4     0x03
    lane_sel_5     0x02
    lane_sel_6     0x01
    lane_sel_7        0
    neg               0
    neg_hi            0
    op             0x20   v_fma_mix_f32_e64_dpp
    op_sel            0
    op_sel_hi         0
    op_sel_hi_2       0
    src0           0x01
    src1          0x102
    src2          0x103
    vdst           0xff

I'll file a ticket on this issue then. I think we should not update tests till the issue is fixed.


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  https://reviews.llvm.org/D132957/new/

https://reviews.llvm.org/D132957