[PATCH] D131959: [AMDGPU] Fix SDST operand of V_DIV_SCALE to always be VCC

Tue Aug 30 23:56:39 PDT 2022

Pierre-vh added a comment.

@nhaehnle, @foad sorry for the ping, but I see you've also contributed to DAGISel so I was wondering if you had any input regarding the issue highlighted above.
Do you think there's a problem in the DIV_FMAS pattern, SIInstrInfo or the DIV_SCALE lowering?

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Comment at: llvm/test/tools/llvm-mca/AMDGPU/gfx11-double.s:147
 # CHECK-NEXT: [0,8]     .    .    .    .    .    .    .    .    DeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeE.   v_fract_f64_e32 v[4:5], v[4:5]
+# CHECK-NEXT: Truncated display due to cycle limit

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rampitec wrote:
> foad wrote:
> > Pierre-vh wrote:
> > > Not sure why this popped up, I don't really understand the message
> > Add `--timeline-max-cycles=0` to the RUN line? All the other files in this directory have it.
> Why did it change at all?
I don't think it changed, just content was added to it. I think the previous person that updated it didn't add the `--timeline-max-cycles=0` and instead removed the check line with the cycles limit.

I think I can revert all these and the test should still pass, it'll just cover less instructions?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131959/new/

https://reviews.llvm.org/D131959