[PATCH] D132573: [AArch64 - SVE]: Use SVE to lower reduce.fadd.

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-fadd-reduce.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mattr=+sve -mtriple=aarch64  %s -o - | FileCheck %s --check-prefixes=CHECK
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Hi @hassnaa-arm, could you just reuse the existing fixed-length tests in CodeGen/AArch64/sve-fixed-length-fp-reduce.ll and just add another RUN line:

; RUN: llc -aarch64-sve-vector-bits-min=128  < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_128

That test file already contains many of the tests added here.


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Comment at: llvm/test/CodeGen/AArch64/sve-fixed-length-fadd-reduce.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mattr=+sve -mtriple=aarch64  %s -o - | FileCheck %s --check-prefixes=CHECK
+
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sdesmalen wrote:
> Could you also add some RUN lines for other vector lengths?
I think if we reuse sve-fixed-length-fp-reduce.ll, then we get the other lengths for free?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D132573/new/

https://reviews.llvm.org/D132573