[PATCH] D132798: [RISCV] Add more invertible setccs to tryDemorganOfBooleanCondition.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:9210
                          Setcc.getOperand(1), CCVal);
+  } else if (CCVal == ISD::SETLT && isNullConstant(Setcc.getOperand(0))) {
+    // Invert (setlt 0, X) by converting to (setlt X, 1).
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reames wrote:
> I think we can generalize this for any constant operand where adding one doesn't overflow?  If so, mind doing that in a follow up?
Its more complicated because the constant on the LHS can't be folded into the instruction. 0 is special because it will select x0. But I'll try to see if there is anything that makes sense.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D132798/new/

https://reviews.llvm.org/D132798