[PATCH] D132373: [RISCV] When ISD::SETUGT && Imm == -1, processed before lowering

Wed Aug 24 02:22:01 PDT 2022

Miss_Grape added a comment.

In D132373#3739786 <https://reviews.llvm.org/D132373#3739786>, @craig.topper wrote:

> In D132373#3739683 <https://reviews.llvm.org/D132373#3739683>, @reames wrote:
>
>> Please follow LLVM development policies.  Add a description of the change, and tests which demonstrate it.
>
> This is removing code that I added out of paranoia. I agree it should never happen.
>
> At the very least it needs a comment and an assert.

I think this scenario has already been processed in the previous optimization stage. What do you think would be more appropriate to change?

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132373/new/

https://reviews.llvm.org/D132373