[PATCH] D131254: [AMDGPU][GISel] Enable Selection of ADD3 for G_PTR_ADD

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

Would it make sense to match (ptradd a, (add, b, c)) as well as (ptradd (ptradd a, b), c) ?



================
Comment at: llvm/lib/Target/AMDGPU/VOP3Instructions.td:452
   // blocking folding SGPR->VGPR copies later.
-  // FIXME: There's no register bank verifier
+  // FIXME: There's no register bank verifier  
   let GISelPredicateCode = [{
----------------
Did you add trailing whitespace?


================
Comment at: llvm/lib/Target/AMDGPU/VOP3Instructions.td:459
+
+      // FIX: Somehow my changes made this predicate run before the
+      // Feature check, so it crashes without this.
----------------
Should be "FIXME". But it would be good to understand and fix this before committing.


================
Comment at: llvm/lib/Target/AMDGPU/VOP3Instructions.td:461
+      // Feature check, so it crashes without this.
+      if(!Operands[i] || !Operands[i]->isReg())
+        return true; 
----------------
Space after `if`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131254/new/

https://reviews.llvm.org/D131254