[PATCH] D132436: [AMDGPU][SIFrameLowering] Unify custom SGPR spill saves and restores (NFC)

Sebastian Neubauer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 23 05:04:49 PDT 2022


sebastian-ne added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:269
+
+  void copyToScratchSGPR(Register DstReg) const {
+    const TargetRegisterClass *RC = TRI.getPhysRegClass(DstReg);
----------------
cdevadas wrote:
> sebastian-ne wrote:
> > Why does this code split the copies into SubRegs and copyFromScratchSGPR doesn’t?
> For the purpose of emitting CFI directives for each copy. There is no CFI emitted in the epilogue.
> There is more coming in the downstream version of this patch.
Hm, does that mean CFI cannot represent register pairs?
If so, can we emit a single copy instruction for the super register and multiple CFI instructions for the subregisters?


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132436/new/

https://reviews.llvm.org/D132436



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