[llvm] 0a8dd8e - [AMDGPU][MC][GFX10][NFC] Consolidate tests by encoding
Dmitry Preobrazhensky via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 22 09:54:35 PDT 2022
Author: Dmitry Preobrazhensky
Date: 2022-08-22T19:53:56+03:00
New Revision: 0a8dd8ef791b180e9728d5675715a9eef8b2e54a
URL: https://github.com/llvm/llvm-project/commit/0a8dd8ef791b180e9728d5675715a9eef8b2e54a
DIFF: https://github.com/llvm/llvm-project/commit/0a8dd8ef791b180e9728d5675715a9eef8b2e54a.diff
LOG: [AMDGPU][MC][GFX10][NFC] Consolidate tests by encoding
Differential Revision: https://reviews.llvm.org/D132235
Added:
llvm/test/MC/Disassembler/AMDGPU/gfx10-null-reg.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt
llvm/test/MC/Disassembler/AMDGPU/gfx1030_new.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_exp.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_mtbuf.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt
Modified:
llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt
Removed:
llvm/test/MC/Disassembler/AMDGPU/exp_gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/flat_gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/gfx1011_dasm_dlops.txt
llvm/test/MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp16.txt
llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp8.txt
llvm/test/MC/Disassembler/AMDGPU/gfx90a_dasm_features.txt
llvm/test/MC/Disassembler/AMDGPU/gfx940_dasm_features.txt
llvm/test/MC/Disassembler/AMDGPU/literalv216_gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/mimg_gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/mtbuf_gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/null-reg.txt
llvm/test/MC/Disassembler/AMDGPU/sop2_gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/vcmp-gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/vcmpx-gfx10.txt
llvm/test/MC/Disassembler/AMDGPU/vop3-literal.txt
llvm/test/MC/Disassembler/AMDGPU/wave32.txt
################################################################################
diff --git a/llvm/test/MC/Disassembler/AMDGPU/flat_gfx10.txt b/llvm/test/MC/Disassembler/AMDGPU/flat_gfx10.txt
deleted file mode 100644
index 60aef3ce146b0..0000000000000
--- a/llvm/test/MC/Disassembler/AMDGPU/flat_gfx10.txt
+++ /dev/null
@@ -1,309 +0,0 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck %s
-
-#===------------------------------------------------------------------------===#
-# scratch_load
-#===------------------------------------------------------------------------===#
-
-# CHECK: scratch_load_dword v1, v255, off offset:-1 glc dlc ; encoding: [0xff,0x5f,0x31,0xdc,0xff,0x00,0x7d,0x01]
-0xff 0x5f 0x31 0xdc 0xff 0x00 0x7d 0x01
-
-# CHECK: scratch_load_dword v5, v255, off offset:-1 glc slc ; encoding: [0xff,0x4f,0x33,0xdc,0xff,0x00,0x7d,0x05]
-0xff 0x4f 0x33 0xdc 0xff 0x00 0x7d 0x05
-
-# CHECK: scratch_load_dword v0, v1, off offset:-2048 glc slc dlc ; encoding: [0x00,0x58,0x33,0xdc,0x01,0x00,0x7d,0x00]
-0x00 0x58 0x33 0xdc 0x01 0x00 0x7d 0x00
-
-# CHECK: scratch_load_dword v255, off, s105 offset:2047 dlc ; encoding: [0xff,0x57,0x30,0xdc,0x00,0x00,0x69,0xff]
-0xff 0x57 0x30 0xdc 0x00 0x00 0x69 0xff
-
-# CHECK: scratch_load_dword v255, v2, off ; encoding: [0x00,0x40,0x30,0xdc,0x02,0x00,0x7d,0xff]
-0x00 0x40 0x30 0xdc 0x02 0x00 0x7d 0xff
-
-# CHECK: scratch_load_dword v5, v0, off dlc ; encoding: [0x00,0x50,0x30,0xdc,0x00,0x00,0x7d,0x05]
-0x00 0x50 0x30 0xdc 0x00 0x00 0x7d 0x05
-
-# CHECK: scratch_load_dword v5, v3, off slc ; encoding: [0x00,0x40,0x32,0xdc,0x03,0x00,0x7d,0x05]
-0x00 0x40 0x32 0xdc 0x03 0x00 0x7d 0x05
-
-# CHECK: scratch_load_dword v5, v255, off slc dlc ; encoding: [0x00,0x50,0x32,0xdc,0xff,0x00,0x7d,0x05]
-0x00 0x50 0x32 0xdc 0xff 0x00 0x7d 0x05
-
-# CHECK: scratch_load_dword v255, off, s2 offset:1 ; encoding: [0x01,0x40,0x30,0xdc,0x00,0x00,0x02,0xff]
-0x01 0x40 0x30 0xdc 0x00 0x00 0x02 0xff
-
-#===------------------------------------------------------------------------===#
-# scratch_store
-#===------------------------------------------------------------------------===#
-
-# CHECK: scratch_store_dword off, v2, s3 offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x03,0x00]
-0xff,0x4f,0x70,0xdc,0x00,0x02,0x03,0x00
-
-# CHECK: scratch_store_dword off, v255, s3 offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0xff,0x03,0x00]
-0xff,0x4f,0x70,0xdc,0x00,0xff,0x03,0x00
-
-# CHECK: scratch_store_dword off, v2, s105 offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x69,0x00]
-0xff,0x4f,0x70,0xdc,0x00,0x02,0x69,0x00
-
-# CHECK: scratch_store_dword off, v2, vcc_lo offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x6a,0x00]
-0xff,0x4f,0x70,0xdc,0x00,0x02,0x6a,0x00
-
-# CHECK: scratch_store_dword off, v2, vcc_hi offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x6b,0x00]
-0xff,0x4f,0x70,0xdc,0x00,0x02,0x6b,0x00
-
-# CHECK: scratch_store_dword off, v2, ttmp15 offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x7b,0x00]
-0xff,0x4f,0x70,0xdc,0x00,0x02,0x7b,0x00
-
-# CHECK: scratch_store_dword v0, v2, off offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x7d,0x00]
-0xff,0x4f,0x70,0xdc,0x00,0x02,0x7d,0x00
-
-# CHECK: scratch_store_dword off, v2, s3 ; encoding: [0x00,0x40,0x70,0xdc,0x00,0x02,0x03,0x00]
-0x00,0x40,0x70,0xdc,0x00,0x02,0x03,0x00
-
-# CHECK: scratch_store_dword off, v2, s3 offset:2047 ; encoding: [0xff,0x47,0x70,0xdc,0x00,0x02,0x03,0x00]
-0xff,0x47,0x70,0xdc,0x00,0x02,0x03,0x00
-
-# CHECK: scratch_store_dword off, v2, s3 offset:-2048 ; encoding: [0x00,0x48,0x70,0xdc,0x00,0x02,0x03,0x00]
-0x00,0x48,0x70,0xdc,0x00,0x02,0x03,0x00
-
-# CHECK: scratch_store_dword off, v2, s3 offset:-1 glc ; encoding: [0xff,0x4f,0x71,0xdc,0x00,0x02,0x03,0x00]
-0xff,0x4f,0x71,0xdc,0x00,0x02,0x03,0x00
-
-# CHECK: scratch_store_dword off, v2, s3 offset:-1 slc ; encoding: [0xff,0x4f,0x72,0xdc,0x00,0x02,0x03,0x00]
-0xff,0x4f,0x72,0xdc,0x00,0x02,0x03,0x00
-
-# CHECK: scratch_store_dword off, v2, s3 offset:-1 dlc ; encoding: [0xff,0x5f,0x70,0xdc,0x00,0x02,0x03,0x00]
-0xff,0x5f,0x70,0xdc,0x00,0x02,0x03,0x00
-
-#===------------------------------------------------------------------------===#
-# FLAT opcodes: dlc support for atomics
-#===------------------------------------------------------------------------===#
-
-# CHECK: flat_atomic_add v[1:2], v2 dlc ; encoding: [0x00,0x10,0xc8,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xc8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_add_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x48,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x48,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_and v[1:2], v2 dlc ; encoding: [0x00,0x10,0xe4,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xe4,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_and_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x64,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x64,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_cmpswap v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0xc4,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xc4,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_cmpswap_x2 v[1:2], v[2:5] dlc ; encoding: [0x00,0x10,0x44,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x44,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_dec v[1:2], v2 dlc ; encoding: [0x00,0x10,0xf4,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xf4,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_dec_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x74,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x74,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_fcmpswap v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0xf8,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xf8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_fcmpswap_x2 v[1:2], v[2:5] dlc ; encoding: [0x00,0x10,0x78,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x78,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_fmax v[1:2], v2 dlc ; encoding: [0x00,0x10,0x00,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x00,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_fmax_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x80,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x80,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_fmin v[1:2], v2 dlc ; encoding: [0x00,0x10,0xfc,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xfc,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_fmin_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x7c,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x7c,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_inc v[1:2], v2 dlc ; encoding: [0x00,0x10,0xf0,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xf0,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_inc_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x70,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x70,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_or v[1:2], v2 dlc ; encoding: [0x00,0x10,0xe8,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xe8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_or_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x68,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x68,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_smax v[1:2], v2 dlc ; encoding: [0x00,0x10,0xdc,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xdc,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_smax_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x5c,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x5c,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_smin v[1:2], v2 dlc ; encoding: [0x00,0x10,0xd4,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xd4,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_smin_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x54,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x54,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_sub v[1:2], v2 dlc ; encoding: [0x00,0x10,0xcc,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xcc,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_sub_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x4c,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x4c,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_swap v[1:2], v2 dlc ; encoding: [0x00,0x10,0xc0,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xc0,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_swap_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x40,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x40,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_umax v[1:2], v2 dlc ; encoding: [0x00,0x10,0xe0,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xe0,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_umax_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x60,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x60,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_umin v[1:2], v2 dlc ; encoding: [0x00,0x10,0xd8,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xd8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_umin_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x58,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x58,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_xor v[1:2], v2 dlc ; encoding: [0x00,0x10,0xec,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x10,0xec,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: flat_atomic_xor_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x6c,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x10,0x6c,0xdd,0x01,0x02,0x7d,0x00
-
-#===------------------------------------------------------------------------===#
-# FLAT GLOBAL opcodes: dlc support for atomics
-#===------------------------------------------------------------------------===#
-
-# CHECK: global_atomic_add v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xc8,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xc8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_add_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x48,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x48,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_and v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xe4,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xe4,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_and_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x64,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x64,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_cmpswap v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0xc4,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xc4,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_cmpswap_x2 v[1:2], v[2:5], off dlc ; encoding: [0x00,0x90,0x44,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x44,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_dec v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xf4,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xf4,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_dec_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x74,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x74,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fmax v[1:2], v2, off dlc ; encoding: [0x00,0x90,0x00,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x00,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fmax_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x80,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x80,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fmin v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xfc,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xfc,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fmin_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x7c,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x7c,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_inc v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xf0,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xf0,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_inc_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x70,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x70,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_or v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xe8,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xe8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_or_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x68,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x68,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_smax v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xdc,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xdc,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_smax_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x5c,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x5c,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_smin v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xd4,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xd4,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_smin_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x54,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x54,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_sub v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xcc,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xcc,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_sub_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x4c,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x4c,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_swap v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xc0,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xc0,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_swap_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x40,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x40,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_umax v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xe0,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xe0,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_umax_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x60,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x60,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_umin v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xd8,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xd8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_umin_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x58,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x58,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_xor v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xec,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x90,0xec,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_xor_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x6c,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x90,0x6c,0xdd,0x01,0x02,0x7d,0x00
-
-#===------------------------------------------------------------------------===#
-# FLAT GLOBAL opcodes: fcmpswap
-#===------------------------------------------------------------------------===#
-
-# CHECK: global_atomic_fcmpswap v[1:2], v[2:3], off offset:-1 ; encoding: [0xff,0x8f,0xf8,0xdc,0x01,0x02,0x7d,0x00]
-0xff,0x8f,0xf8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fcmpswap v5, v[1:2], v[2:3], off offset:-1 glc ; encoding: [0xff,0x8f,0xf9,0xdc,0x01,0x02,0x7d,0x05]
-0xff,0x8f,0xf9,0xdc,0x01,0x02,0x7d,0x05
-
-# CHECK: global_atomic_fcmpswap v[1:2], v[2:3], off offset:2047 ; encoding: [0xff,0x87,0xf8,0xdc,0x01,0x02,0x7d,0x00]
-0xff,0x87,0xf8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fcmpswap v[1:2], v[2:3], off offset:-2048 ; encoding: [0x00,0x88,0xf8,0xdc,0x01,0x02,0x7d,0x00]
-0x00,0x88,0xf8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fcmpswap v[1:2], v[2:3], off offset:-1 slc ; encoding: [0xff,0x8f,0xfa,0xdc,0x01,0x02,0x7d,0x00]
-0xff,0x8f,0xfa,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fcmpswap v[1:2], v[2:3], off offset:-1 dlc ; encoding: [0xff,0x9f,0xf8,0xdc,0x01,0x02,0x7d,0x00]
-0xff,0x9f,0xf8,0xdc,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:-1 ; encoding: [0xff,0x8f,0x78,0xdd,0x01,0x02,0x7d,0x00]
-0xff,0x8f,0x78,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fcmpswap_x2 v[5:6], v[1:2], v[2:5], off offset:-1 glc ; encoding: [0xff,0x8f,0x79,0xdd,0x01,0x02,0x7d,0x05]
-0xff,0x8f,0x79,0xdd,0x01,0x02,0x7d,0x05
-
-# CHECK: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:2047 ; encoding: [0xff,0x87,0x78,0xdd,0x01,0x02,0x7d,0x00]
-0xff,0x87,0x78,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:-2048 ; encoding: [0x00,0x88,0x78,0xdd,0x01,0x02,0x7d,0x00]
-0x00,0x88,0x78,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:-1 slc ; encoding: [0xff,0x8f,0x7a,0xdd,0x01,0x02,0x7d,0x00]
-0xff,0x8f,0x7a,0xdd,0x01,0x02,0x7d,0x00
-
-# CHECK: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:-1 dlc ; encoding: [0xff,0x9f,0x78,0xdd,0x01,0x02,0x7d,0x00]
-0xff,0x9f,0x78,0xdd,0x01,0x02,0x7d,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/null-reg.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10-null-reg.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/null-reg.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx10-null-reg.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/vop3-literal.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/vop3-literal.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx10-vop3-literal.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/wave32.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/wave32.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx10-wave32.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1011_dasm_dlops.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/gfx1011_dasm_dlops.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx1030_new.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx1030_new.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp16.txt
deleted file mode 100644
index 94fb1d811f3fd..0000000000000
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp16.txt
+++ /dev/null
@@ -1,670 +0,0 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W64 %s
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mov_b32_dpp v255, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0xfe,0x7f,0x01,0x1b,0x00,0x00]
-0xfa,0x02,0xfe,0x7f,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mov_b32_dpp v5, v255 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0xff,0x1b,0x00,0x00]
-0xfa,0x02,0x0a,0x7e,0xff,0x1b,0x00,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x40,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x40,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x41,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x41,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x01,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x01,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x0f,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x0f,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x11,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x11,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1f,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x1f,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x21,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x21,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x2f,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x2f,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_share:0 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x50,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x50,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_share:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x5f,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x5f,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_xmask:0 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x60,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x60,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 row_xmask:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x6f,0x01,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x6f,0x01,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x10]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x10
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x30]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x30
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0xf0]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0xf0
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x01]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x01
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x03]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x03
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x0f]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x0f
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x08,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x08,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f32_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_f32_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_u32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_f16_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_f32_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_fract_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_trunc_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_ceil_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_rndne_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_floor_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_exp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_log_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_rcp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_rcp_iflag_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_rsq_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_sqrt_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_sin_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cos_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_not_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_ffbh_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_ffbl_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_ffbh_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_frexp_mant_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_f16_u16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_f16_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_rcp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_sqrt_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_rsq_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_log_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_exp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_frexp_mant_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_floor_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_ceil_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_trunc_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_rndne_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_fract_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_sin_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cos_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x00,0x00]
-0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00
-
-# GFX10: v_add_f32_dpp v5, -v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x10,0x00]
-0xfa,0x04,0x0a,0x06,0x01,0x1b,0x10,0x00
-
-# GFX10: v_add_f32_dpp v5, |v1|, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x20,0x00]
-0xfa,0x04,0x0a,0x06,0x01,0x1b,0x20,0x00
-
-# GFX10: v_add_f32_dpp v5, v1, -v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x40,0x00]
-0xfa,0x04,0x0a,0x06,0x01,0x1b,0x40,0x00
-
-# GFX10: v_add_f32_dpp v5, v1, |v2| quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x80,0x00]
-0xfa,0x04,0x0a,0x06,0x01,0x1b,0x80,0x00
-
-# GFX10: v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00
-
-# GFX10: v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00
-
-# GFX10: v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00
-
-# GFX10: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00
-
-# GFX10: v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00
-
-# GFX10: v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00
-
-# GFX10: v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00
-
-# GFX10: v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00
-
-# GFX10: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00
-
-# GFX10: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0x00
-
-# GFX10: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00
-
-# GFX10: v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00
-
-# GFX10: v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00
-
-# GFX10: v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00
-
-# GFX10: v_xnor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00
-
-# W32: v_cndmask_b32_dpp v0, v1, v2, vcc_lo dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x00,0x02,0x01,0x77,0x39,0x05]
-# W64: v_cndmask_b32_dpp v0, v1, v2, vcc dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x00,0x02,0x01,0x77,0x39,0x05]
-0xe9,0x04,0x00,0x02,0x01,0x77,0x39,0x05
-
-# W32: v_cndmask_b32_dpp v0, v1, v2, vcc_lo dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x00,0x02,0x01,0x88,0xc6,0xfa]
-# W64: v_cndmask_b32_dpp v0, v1, v2, vcc dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x00,0x02,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x00,0x02,0x01,0x88,0xc6,0xfa
-
-# W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
-# W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00
-
-# W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
-# W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00
-
-# W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
-# W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00
-
-# GFX10: v_fmac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00
-
-# GFX10: v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00
-
-# GFX10: v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00
-
-# GFX10: v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00
-
-# GFX10: v_fmac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00
-
-# GFX10: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0x00
-
-# GFX10: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0x00
-
-# GFX10: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0x00
-
-# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f32_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f32_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_u32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f16_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f32_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_fract_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_trunc_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_ceil_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_rndne_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_floor_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_exp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_log_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_rcp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_rcp_iflag_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_rsq_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_sqrt_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_sin_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cos_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_not_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_ffbh_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_ffbl_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_ffbh_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_frexp_mant_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f16_u16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_f16_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_rcp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_sqrt_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_rsq_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_log_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_exp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_frexp_mant_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_floor_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_ceil_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_trunc_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_rndne_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_fract_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_sin_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cos_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x04,0x00]
-0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x06,0x01,0x1b,0x04,0x00
-
-# GFX10: v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x08,0x01,0x1b,0x04,0x00
-
-# GFX10: v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x04,0x00
-
-# GFX10: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x10,0x01,0x1b,0x04,0x00
-
-# GFX10: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x12,0x01,0x1b,0x04,0x00
-
-# GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x14,0x01,0x1b,0x04,0x00
-
-# GFX10: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x16,0x01,0x1b,0x04,0x00
-
-# GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x18,0x01,0x1b,0x04,0x00
-
-# GFX10: v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x20,0x01,0x1b,0x04,0x00
-
-# GFX10: v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x22,0x01,0x1b,0x04,0x00
-
-# GFX10: v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x24,0x01,0x1b,0x04,0x00
-
-# GFX10: v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x26,0x01,0x1b,0x04,0x00
-
-# GFX10: v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x28,0x01,0x1b,0x04,0x00
-
-# GFX10: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x04,0x00
-
-# GFX10: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x30,0x01,0x1b,0x04,0x00
-
-# GFX10: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x34,0x01,0x1b,0x04,0x00
-
-# GFX10: v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x36,0x01,0x1b,0x04,0x00
-
-# GFX10: v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x38,0x01,0x1b,0x04,0x00
-
-# GFX10: v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x04,0x00
-
-# GFX10: v_xnor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x04,0x00
-
-# GFX10: v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x04,0x00
-
-# W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x04,0x00]
-# W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x50,0x01,0x1b,0x04,0x00
-
-# W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x04,0x00]
-# W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x52,0x01,0x1b,0x04,0x00
-
-# W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x04,0x00]
-# W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x54,0x01,0x1b,0x04,0x00
-
-# GFX10: v_fmac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x56,0x01,0x1b,0x04,0x00
-
-# GFX10: v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x64,0x01,0x1b,0x04,0x00
-
-# GFX10: v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x66,0x01,0x1b,0x04,0x00
-
-# GFX10: v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x68,0x01,0x1b,0x04,0x00
-
-# GFX10: v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x04,0x00
-
-# GFX10: v_fmac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x04,0x00
-
-# GFX10: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x72,0x01,0x1b,0x04,0x00
-
-# GFX10: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x74,0x01,0x1b,0x04,0x00
-
-# GFX10: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x76,0x01,0x1b,0x04,0x00
-
-# GFX10: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x00,0x00]
-0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x00,0x00
-
-# GFX10: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x08,0x00]
-0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x08,0x00
-
-# GFX10: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x04,0x00
-
-# GFX10: v_sub_nc_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00]
-0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00
-
-# GFX10: v_sub_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x04,0x00
-
-# GFX10: v_subrev_nc_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00]
-0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00
-
-# GFX10: v_subrev_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x04,0x00]
-0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x04,0x00
-
-# GFX10: v_movreld_b32_dpp v1, v0 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x84,0x02,0x7e,0x00,0x1b,0x00,0x00]
-0xfa,0x84,0x02,0x7e,0x00,0x1b,0x00,0x00
-
-# GFX10: v_movrels_b32_dpp v1, v0 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x86,0x02,0x7e,0x00,0x1b,0x04,0x00]
-0xfa,0x86,0x02,0x7e,0x00,0x1b,0x04,0x00
-
-# GFX10: v_movrelsd_2_b32_dpp v0, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x90,0x00,0x7e,0x02,0x1b,0x00,0x00]
-0xfa,0x90,0x00,0x7e,0x02,0x1b,0x00,0x00
-
-# GFX10: v_movrelsd_b32_dpp v0, v255 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x88,0x00,0x7e,0xff,0x1b,0x00,0x00]
-0xfa,0x88,0x00,0x7e,0xff,0x1b,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/exp_gfx10.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_exp.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/exp_gfx10.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx10_exp.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
index 35a2f469f1fd8..aabd9de2a3b2b 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
@@ -2,6 +2,318 @@
# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+#===------------------------------------------------------------------------===#
+# scratch_load
+#===------------------------------------------------------------------------===#
+
+# GFX10: scratch_load_dword v1, v255, off offset:-1 glc dlc ; encoding: [0xff,0x5f,0x31,0xdc,0xff,0x00,0x7d,0x01]
+0xff 0x5f 0x31 0xdc 0xff 0x00 0x7d 0x01
+
+# GFX10: scratch_load_dword v5, v255, off offset:-1 glc slc ; encoding: [0xff,0x4f,0x33,0xdc,0xff,0x00,0x7d,0x05]
+0xff 0x4f 0x33 0xdc 0xff 0x00 0x7d 0x05
+
+# GFX10: scratch_load_dword v0, v1, off offset:-2048 glc slc dlc ; encoding: [0x00,0x58,0x33,0xdc,0x01,0x00,0x7d,0x00]
+0x00 0x58 0x33 0xdc 0x01 0x00 0x7d 0x00
+
+# GFX10: scratch_load_dword v255, off, s105 offset:2047 dlc ; encoding: [0xff,0x57,0x30,0xdc,0x00,0x00,0x69,0xff]
+0xff 0x57 0x30 0xdc 0x00 0x00 0x69 0xff
+
+# GFX10: scratch_load_dword v255, v2, off ; encoding: [0x00,0x40,0x30,0xdc,0x02,0x00,0x7d,0xff]
+0x00 0x40 0x30 0xdc 0x02 0x00 0x7d 0xff
+
+# GFX10: scratch_load_dword v5, v0, off dlc ; encoding: [0x00,0x50,0x30,0xdc,0x00,0x00,0x7d,0x05]
+0x00 0x50 0x30 0xdc 0x00 0x00 0x7d 0x05
+
+# GFX10: scratch_load_dword v5, v3, off slc ; encoding: [0x00,0x40,0x32,0xdc,0x03,0x00,0x7d,0x05]
+0x00 0x40 0x32 0xdc 0x03 0x00 0x7d 0x05
+
+# GFX10: scratch_load_dword v5, v255, off slc dlc ; encoding: [0x00,0x50,0x32,0xdc,0xff,0x00,0x7d,0x05]
+0x00 0x50 0x32 0xdc 0xff 0x00 0x7d 0x05
+
+# GFX10: scratch_load_dword v255, off, s2 offset:1 ; encoding: [0x01,0x40,0x30,0xdc,0x00,0x00,0x02,0xff]
+0x01 0x40 0x30 0xdc 0x00 0x00 0x02 0xff
+
+#===------------------------------------------------------------------------===#
+# scratch_store
+#===------------------------------------------------------------------------===#
+
+# GFX10: scratch_store_dword off, v2, s3 offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x03,0x00]
+0xff,0x4f,0x70,0xdc,0x00,0x02,0x03,0x00
+
+# GFX10: scratch_store_dword off, v255, s3 offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0xff,0x03,0x00]
+0xff,0x4f,0x70,0xdc,0x00,0xff,0x03,0x00
+
+# GFX10: scratch_store_dword off, v2, s105 offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x69,0x00]
+0xff,0x4f,0x70,0xdc,0x00,0x02,0x69,0x00
+
+# GFX10: scratch_store_dword off, v2, vcc_lo offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x6a,0x00]
+0xff,0x4f,0x70,0xdc,0x00,0x02,0x6a,0x00
+
+# GFX10: scratch_store_dword off, v2, vcc_hi offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x6b,0x00]
+0xff,0x4f,0x70,0xdc,0x00,0x02,0x6b,0x00
+
+# GFX10: scratch_store_dword off, v2, ttmp15 offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x7b,0x00]
+0xff,0x4f,0x70,0xdc,0x00,0x02,0x7b,0x00
+
+# GFX10: scratch_store_dword v0, v2, off offset:-1 ; encoding: [0xff,0x4f,0x70,0xdc,0x00,0x02,0x7d,0x00]
+0xff,0x4f,0x70,0xdc,0x00,0x02,0x7d,0x00
+
+# GFX10: scratch_store_dword off, v2, s3 ; encoding: [0x00,0x40,0x70,0xdc,0x00,0x02,0x03,0x00]
+0x00,0x40,0x70,0xdc,0x00,0x02,0x03,0x00
+
+# GFX10: scratch_store_dword off, v2, s3 offset:2047 ; encoding: [0xff,0x47,0x70,0xdc,0x00,0x02,0x03,0x00]
+0xff,0x47,0x70,0xdc,0x00,0x02,0x03,0x00
+
+# GFX10: scratch_store_dword off, v2, s3 offset:-2048 ; encoding: [0x00,0x48,0x70,0xdc,0x00,0x02,0x03,0x00]
+0x00,0x48,0x70,0xdc,0x00,0x02,0x03,0x00
+
+# GFX10: scratch_store_dword off, v2, s3 offset:-1 glc ; encoding: [0xff,0x4f,0x71,0xdc,0x00,0x02,0x03,0x00]
+0xff,0x4f,0x71,0xdc,0x00,0x02,0x03,0x00
+
+# GFX10: scratch_store_dword off, v2, s3 offset:-1 slc ; encoding: [0xff,0x4f,0x72,0xdc,0x00,0x02,0x03,0x00]
+0xff,0x4f,0x72,0xdc,0x00,0x02,0x03,0x00
+
+# GFX10: scratch_store_dword off, v2, s3 offset:-1 dlc ; encoding: [0xff,0x5f,0x70,0xdc,0x00,0x02,0x03,0x00]
+0xff,0x5f,0x70,0xdc,0x00,0x02,0x03,0x00
+
+#===------------------------------------------------------------------------===#
+# FLAT opcodes: dlc support for atomics
+#===------------------------------------------------------------------------===#
+
+# GFX10: flat_atomic_add v[1:2], v2 dlc ; encoding: [0x00,0x10,0xc8,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xc8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_add_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x48,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x48,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_and v[1:2], v2 dlc ; encoding: [0x00,0x10,0xe4,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xe4,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_and_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x64,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x64,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_cmpswap v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0xc4,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xc4,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_cmpswap_x2 v[1:2], v[2:5] dlc ; encoding: [0x00,0x10,0x44,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x44,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_dec v[1:2], v2 dlc ; encoding: [0x00,0x10,0xf4,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xf4,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_dec_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x74,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x74,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_fcmpswap v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0xf8,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xf8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_fcmpswap_x2 v[1:2], v[2:5] dlc ; encoding: [0x00,0x10,0x78,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x78,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_fmax v[1:2], v2 dlc ; encoding: [0x00,0x10,0x00,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x00,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_fmax_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x80,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x80,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_fmin v[1:2], v2 dlc ; encoding: [0x00,0x10,0xfc,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xfc,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_fmin_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x7c,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x7c,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_inc v[1:2], v2 dlc ; encoding: [0x00,0x10,0xf0,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xf0,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_inc_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x70,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x70,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_or v[1:2], v2 dlc ; encoding: [0x00,0x10,0xe8,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xe8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_or_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x68,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x68,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_smax v[1:2], v2 dlc ; encoding: [0x00,0x10,0xdc,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xdc,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_smax_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x5c,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x5c,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_smin v[1:2], v2 dlc ; encoding: [0x00,0x10,0xd4,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xd4,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_smin_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x54,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x54,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_sub v[1:2], v2 dlc ; encoding: [0x00,0x10,0xcc,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xcc,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_sub_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x4c,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x4c,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_swap v[1:2], v2 dlc ; encoding: [0x00,0x10,0xc0,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xc0,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_swap_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x40,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x40,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_umax v[1:2], v2 dlc ; encoding: [0x00,0x10,0xe0,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xe0,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_umax_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x60,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x60,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_umin v[1:2], v2 dlc ; encoding: [0x00,0x10,0xd8,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xd8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_umin_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x58,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x58,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_xor v[1:2], v2 dlc ; encoding: [0x00,0x10,0xec,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x10,0xec,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: flat_atomic_xor_x2 v[1:2], v[2:3] dlc ; encoding: [0x00,0x10,0x6c,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x10,0x6c,0xdd,0x01,0x02,0x7d,0x00
+
+#===------------------------------------------------------------------------===#
+# FLAT GLOBAL opcodes: dlc support for atomics
+#===------------------------------------------------------------------------===#
+
+# GFX10: global_atomic_add v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xc8,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xc8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_add_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x48,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x48,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_and v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xe4,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xe4,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_and_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x64,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x64,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_cmpswap v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0xc4,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xc4,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_cmpswap_x2 v[1:2], v[2:5], off dlc ; encoding: [0x00,0x90,0x44,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x44,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_dec v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xf4,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xf4,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_dec_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x74,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x74,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fmax v[1:2], v2, off dlc ; encoding: [0x00,0x90,0x00,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x00,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fmax_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x80,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x80,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fmin v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xfc,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xfc,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fmin_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x7c,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x7c,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_inc v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xf0,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xf0,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_inc_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x70,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x70,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_or v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xe8,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xe8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_or_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x68,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x68,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_smax v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xdc,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xdc,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_smax_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x5c,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x5c,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_smin v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xd4,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xd4,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_smin_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x54,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x54,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_sub v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xcc,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xcc,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_sub_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x4c,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x4c,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_swap v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xc0,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xc0,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_swap_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x40,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x40,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_umax v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xe0,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xe0,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_umax_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x60,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x60,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_umin v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xd8,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xd8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_umin_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x58,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x58,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_xor v[1:2], v2, off dlc ; encoding: [0x00,0x90,0xec,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x90,0xec,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_xor_x2 v[1:2], v[2:3], off dlc ; encoding: [0x00,0x90,0x6c,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x90,0x6c,0xdd,0x01,0x02,0x7d,0x00
+
+#===------------------------------------------------------------------------===#
+# FLAT GLOBAL opcodes: fcmpswap
+#===------------------------------------------------------------------------===#
+
+# GFX10: global_atomic_fcmpswap v[1:2], v[2:3], off offset:-1 ; encoding: [0xff,0x8f,0xf8,0xdc,0x01,0x02,0x7d,0x00]
+0xff,0x8f,0xf8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fcmpswap v5, v[1:2], v[2:3], off offset:-1 glc ; encoding: [0xff,0x8f,0xf9,0xdc,0x01,0x02,0x7d,0x05]
+0xff,0x8f,0xf9,0xdc,0x01,0x02,0x7d,0x05
+
+# GFX10: global_atomic_fcmpswap v[1:2], v[2:3], off offset:2047 ; encoding: [0xff,0x87,0xf8,0xdc,0x01,0x02,0x7d,0x00]
+0xff,0x87,0xf8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fcmpswap v[1:2], v[2:3], off offset:-2048 ; encoding: [0x00,0x88,0xf8,0xdc,0x01,0x02,0x7d,0x00]
+0x00,0x88,0xf8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fcmpswap v[1:2], v[2:3], off offset:-1 slc ; encoding: [0xff,0x8f,0xfa,0xdc,0x01,0x02,0x7d,0x00]
+0xff,0x8f,0xfa,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fcmpswap v[1:2], v[2:3], off offset:-1 dlc ; encoding: [0xff,0x9f,0xf8,0xdc,0x01,0x02,0x7d,0x00]
+0xff,0x9f,0xf8,0xdc,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:-1 ; encoding: [0xff,0x8f,0x78,0xdd,0x01,0x02,0x7d,0x00]
+0xff,0x8f,0x78,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fcmpswap_x2 v[5:6], v[1:2], v[2:5], off offset:-1 glc ; encoding: [0xff,0x8f,0x79,0xdd,0x01,0x02,0x7d,0x05]
+0xff,0x8f,0x79,0xdd,0x01,0x02,0x7d,0x05
+
+# GFX10: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:2047 ; encoding: [0xff,0x87,0x78,0xdd,0x01,0x02,0x7d,0x00]
+0xff,0x87,0x78,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:-2048 ; encoding: [0x00,0x88,0x78,0xdd,0x01,0x02,0x7d,0x00]
+0x00,0x88,0x78,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:-1 slc ; encoding: [0xff,0x8f,0x7a,0xdd,0x01,0x02,0x7d,0x00]
+0xff,0x8f,0x7a,0xdd,0x01,0x02,0x7d,0x00
+
+# GFX10: global_atomic_fcmpswap_x2 v[1:2], v[2:5], off offset:-1 dlc ; encoding: [0xff,0x9f,0x78,0xdd,0x01,0x02,0x7d,0x00]
+0xff,0x9f,0x78,0xdd,0x01,0x02,0x7d,0x00
+
+#===------------------------------------------------------------------------===#
+# Other FLAT opcodes
+#===------------------------------------------------------------------------===#
+
# GFX10: flat_atomic_add v[1:2], v2 ; encoding: [0x00,0x00,0xc8,0xdc,0x01,0x02,0x7d,0x00]
0x00,0x00,0xc8,0xdc,0x01,0x02,0x7d,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
index 55c551b86bc52..481a3184509b2 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
@@ -541,3 +541,229 @@
# GFX10: image_sample_c_cd_cl_o v[16:19], [v8, v9, v10, v11, v12, v13, v14], s[20:27], s[100:103] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY ; encoding: [0x24,0x0f,0xbc,0xf1,0x08,0x10,0x25,0x03,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x00,0x00]
0x24,0x0f,0xbc,0xf1,0x08,0x10,0x25,0x03,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10
+
+#===------------------------------------------------------------------------===#
+# MIMG, Miscellaneous instructions
+#===------------------------------------------------------------------------===#
+
+# GFX10: image_load v[4:6], v238, s[28:35] dmask:0x7 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x17,0x00,0xf0,0xee,0x04,0x07,0x00]
+0x00,0x17,0x00,0xf0,0xee,0x04,0x07,0x00
+
+# GFX10: image_load_pck v5, v0, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D glc ; encoding: [0x00,0x21,0x08,0xf0,0x00,0x05,0x02,0x00]
+0x00,0x21,0x08,0xf0,0x00,0x05,0x02,0x00
+
+# GFX10: image_load_pck_sgn v5, v0, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D lwe ; encoding: [0x00,0x01,0x0e,0xf0,0x00,0x05,0x02,0x00]
+0x00,0x01,0x0e,0xf0,0x00,0x05,0x02,0x00
+
+# GFX10: image_load_mip v5, v[0:1], s[8:15] dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x00,0x04,0xf0,0x00,0x05,0x02,0x00]
+0x00,0x00,0x04,0xf0,0x00,0x05,0x02,0x00
+
+# GFX10: image_load_mip_pck v5, v[1:2], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x01,0x10,0xf0,0x01,0x05,0x02,0x00]
+0x00,0x01,0x10,0xf0,0x01,0x05,0x02,0x00
+
+# GFX10: image_load_mip_pck_sgn v[4:5], v[0:1], s[8:15] dmask:0x5 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x05,0x14,0xf0,0x00,0x04,0x02,0x00]
+0x00,0x05,0x14,0xf0,0x00,0x04,0x02,0x00
+
+# GFX10: image_store v[192:194], v238, s[28:35] dmask:0x7 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x17,0x20,0xf0,0xee,0xc0,0x07,0x00]
+0x00,0x17,0x20,0xf0,0xee,0xc0,0x07,0x00
+
+# GFX10: image_store_pck v1, v2, s[12:19] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x28,0xf0,0x02,0x01,0x03,0x00]
+0x00,0x51,0x28,0xf0,0x02,0x01,0x03,0x00
+
+# GFX10: image_store_mip v1, v[2:3], s[12:19] dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x00,0x24,0xf0,0x02,0x01,0x03,0x00]
+0x00,0x00,0x24,0xf0,0x02,0x01,0x03,0x00
+
+# GFX10: image_store_mip_pck v252, v[2:3], s[12:19] dmask:0x1 dim:SQ_RSRC_IMG_1D r128 ; encoding: [0x00,0x81,0x2c,0xf0,0x02,0xfc,0x03,0x00]
+0x00,0x81,0x2c,0xf0,0x02,0xfc,0x03,0x00
+
+# GFX10: image_atomic_sub v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc ; encoding: [0x00,0x31,0x48,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x31,0x48,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_and v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x60,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x60,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_cmpswap v[4:5], v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc ; encoding: [0x00,0x31,0x40,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x31,0x40,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_add v[4:5], v192, s[28:35] dmask:0x3 dim:SQ_RSRC_IMG_1D unorm glc ; encoding: [0x00,0x33,0x44,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x33,0x44,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_or v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x64,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x64,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_xor v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x68,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x68,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_sub v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x48,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x48,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_smin v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x50,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x50,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_smax v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x58,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x58,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_umin v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x54,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x54,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_umax v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x5c,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x5c,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_inc v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x6c,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x6c,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_atomic_dec v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x70,0xf0,0xc0,0x04,0x07,0x00]
+0x00,0x11,0x70,0xf0,0xc0,0x04,0x07,0x00
+
+# GFX10: image_get_resinfo v5, v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x01,0x38,0xf0,0x01,0x05,0x02,0x00]
+0x00,0x01,0x38,0xf0,0x01,0x05,0x02,0x00
+
+# GFX10: image_sample v5, v0, s[8:15], s[12:15] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x01,0x80,0xf0,0x00,0x05,0x62,0x00]
+0x00,0x01,0x80,0xf0,0x00,0x05,0x62,0x00
+
+# GFX10: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
+0x08,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40
+
+# GFX10: image_load v[0:4], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm tfe ; encoding: [0x08,0x1f,0x01,0xf0,0x00,0x00,0x00,0x00]
+0x08,0x1f,0x01,0xf0,0x00,0x00,0x00,0x00
+
+# GFX10: image_load v[0:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 tfe ; encoding: [0x08,0x1f,0x01,0xf0,0x00,0x00,0x00,0x40]
+0x08,0x1f,0x01,0xf0,0x00,0x00,0x00,0x40
+
+# GFX10: image_load v1, v1, s[16:23] dmask:0x1 dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x01,0x00,0xf0,0x01,0x01,0x04,0x40]
+0x08,0x01,0x00,0xf0,0x01,0x01,0x04,0x40
+
+# GFX10: image_load v[1:2], v1, s[16:23] dmask:0x1 dim:SQ_RSRC_IMG_2D a16 tfe ; encoding: [0x08,0x01,0x01,0xf0,0x01,0x01,0x04,0x40]
+0x08,0x01,0x01,0xf0,0x01,0x01,0x04,0x40
+
+# GFX10: image_load v1, v1, s[16:23] dmask:0x1 dim:SQ_RSRC_IMG_2D a16 lwe ; encoding: [0x08,0x01,0x02,0xf0,0x01,0x01,0x04,0x40]
+0x08,0x01,0x02,0xf0,0x01,0x01,0x04,0x40
+
+# GFX10: image_load v[1:2], v1, s[16:23] dmask:0x1 dim:SQ_RSRC_IMG_2D a16 tfe lwe ; encoding: [0x08,0x01,0x03,0xf0,0x01,0x01,0x04,0x40]
+0x08,0x01,0x03,0xf0,0x01,0x01,0x04,0x40
+
+# GFX10: image_load v[1:2], v1, s[16:23] dmask:0x3 dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x03,0x00,0xf0,0x01,0x01,0x04,0x40]
+0x08,0x03,0x00,0xf0,0x01,0x01,0x04,0x40
+
+# GFX10: image_load v[1:4], v1, s[16:23] dmask:0x7 dim:SQ_RSRC_IMG_2D a16 tfe ; encoding: [0x08,0x07,0x01,0xf0,0x01,0x01,0x04,0x40]
+0x08,0x07,0x01,0xf0,0x01,0x01,0x04,0x40
+
+# GFX10: image_load v[1:4], v1, s[16:23] dmask:0xf dim:SQ_RSRC_IMG_2D a16 lwe ; encoding: [0x08,0x0f,0x02,0xf0,0x01,0x01,0x04,0x40]
+0x08,0x0f,0x02,0xf0,0x01,0x01,0x04,0x40
+
+# GFX10: image_load v[1:3], v1, s[16:23] dmask:0x5 dim:SQ_RSRC_IMG_2D a16 tfe lwe ; encoding: [0x08,0x05,0x03,0xf0,0x01,0x01,0x04,0x40]
+0x08,0x05,0x03,0xf0,0x01,0x01,0x04,0x40
+
+# GFX10: image_sample_d v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40]
+0x00,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_d v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40]
+0x08,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_d v[0:3], [v0, v1, v2, v3, v4, v5, v6, v8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D a16 ; encoding: [0x14,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00]
+0x14,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00
+
+# GFX10: image_sample_c_d v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x40]
+0x00,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_c_d v[0:3], v[0:5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x40]
+0x08,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_d_cl v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x40]
+0x00,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_d_cl v[0:3], [v0, v1, v2, v3, v4, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x0c,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x06,0x00,0x00,0x00]
+0x0c,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x06,0x00,0x00,0x00
+
+# GFX10: image_sample_c_d_cl v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xac,0xf0,0x00,0x00,0x40,0x40]
+0x00,0x0f,0xac,0xf0,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_c_d_cl v[0:3], [v0, v1, v2, v3, v4, v5, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x0c,0x0f,0xac,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x07,0x00,0x00]
+0x0c,0x0f,0xac,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x07,0x00,0x00
+
+# GFX10: image_sample_cd v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x40]
+0x00,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_cd v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x40]
+0x08,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_c_cd v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x40]
+0x00,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_c_cd v[0:3], v[0:5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x40]
+0x08,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_cd_cl v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x40]
+0x00,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_cd_cl v[0:3], [v0, v1, v2, v3, v4, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x0c,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x06,0x00,0x00,0x00]
+0x0c,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x06,0x00,0x00,0x00
+
+# GFX10: image_sample_c_cd_cl v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xac,0xf1,0x00,0x00,0x40,0x40]
+0x00,0x0f,0xac,0xf1,0x00,0x00,0x40,0x40
+
+# GFX10: image_sample_c_cd_cl v[0:3], [v0, v1, v2, v3, v4, v5, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x0c,0x0f,0xac,0xf1,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x07,0x00,0x00]
+0x0c,0x0f,0xac,0xf1,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x07,0x00,0x00
+
+# GFX10: image_sample_c_d_o v0, [v0, v1, v2, v3, v4, v5, v6, v8], s[0:7], s[8:11] dmask:0x4 dim:SQ_RSRC_IMG_2D_ARRAY a16 ; encoding: [0x2c,0x04,0xe8,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00]
+0x2c,0x04,0xe8,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00
+
+# GFX10: image_sample_c_d_o v[0:1], [v0, v1, v2, v3, v4, v5, v6, v8], s[0:7], s[8:11] dmask:0x6 dim:SQ_RSRC_IMG_2D_ARRAY a16 ; encoding: [0x2c,0x06,0xe8,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00]
+0x2c,0x06,0xe8,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00
+
+# GFX10: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00]
+0x01,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00
+
+# GFX10: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x00]
+0x0b,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x00
+
+# GFX10: image_sample_d_g16 v[0:3], [v0, v2, v3, v5, v6, v7, v8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D ; encoding: [0x15,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x03,0x05,0x06,0x07,0x08,0x00,0x00]
+0x15,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x03,0x05,0x06,0x07,0x08,0x00,0x00
+
+# GFX10: image_sample_c_d_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x00]
+0x01,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x00
+
+# GFX10: image_sample_c_d_g16 v[0:3], [v0, v1, v3, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06]
+0x0b,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06
+
+# GFX10: image_sample_d_cl_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x00]
+0x01,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x00
+
+# GFX10: image_sample_d_cl_g16 v[0:3], [v0, v2, v4, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x06]
+0x0b,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x06
+
+# GFX10: image_sample_c_d_cl_g16 v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xac,0xf0,0x00,0x00,0x40,0x00]
+0x01,0x0f,0xac,0xf0,0x00,0x00,0x40,0x00
+
+# GFX10: image_sample_c_d_cl_g16 v[0:3], [v0, v1, v3, v5, v6, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0d,0x0f,0xac,0xf0,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06,0x07,0x00,0x00,0x00]
+0x0d,0x0f,0xac,0xf0,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06,0x07,0x00,0x00,0x00
+
+# GFX10: image_sample_cd_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x00]
+0x01,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x00
+
+# GFX10: image_sample_cd_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x00]
+0x0b,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x00
+
+# GFX10: image_sample_c_cd_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x00]
+0x01,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x00
+
+# GFX10: image_sample_c_cd_g16 v[0:3], [v0, v1, v3, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06]
+0x0b,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06
+
+# GFX10: image_sample_cd_cl_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x00]
+0x01,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x00
+
+# GFX10: image_sample_cd_cl_g16 v[0:3], [v0, v2, v4, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x06]
+0x0b,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x06
+
+# GFX10: image_sample_c_cd_cl_g16 v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xac,0xf1,0x00,0x00,0x40,0x00]
+0x01,0x0f,0xac,0xf1,0x00,0x00,0x40,0x00
+
+# GFX10: image_sample_c_cd_cl_g16 v[0:3], [v0, v1, v3, v5, v6, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0d,0x0f,0xac,0xf1,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06,0x07,0x00,0x00,0x00]
+0x0d,0x0f,0xac,0xf1,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06,0x07,0x00,0x00,0x00
+
+# GFX10: image_sample_c_d_o_g16 v0, [v0, v1, v2, v4, v6, v7, v8], s[0:7], s[8:11] dmask:0x4 dim:SQ_RSRC_IMG_2D_ARRAY ; encoding: [0x2d,0x04,0xe8,0xf0,0x00,0x00,0x40,0x00,0x01,0x02,0x04,0x06,0x07,0x08,0x00,0x00]
+0x2d,0x04,0xe8,0xf0,0x00,0x00,0x40,0x00,0x01,0x02,0x04,0x06,0x07,0x08,0x00,0x00
+
+# GFX10: image_sample_c_d_o_g16 v[0:1], [v0, v1, v2, v4, v6, v7, v8], s[0:7], s[8:11] dmask:0x6 dim:SQ_RSRC_IMG_2D_ARRAY ; encoding: [0x2d,0x06,0xe8,0xf0,0x00,0x00,0x40,0x00,0x01,0x02,0x04,0x06,0x07,0x08,0x00,0x00]
+0x2d,0x06,0xe8,0xf0,0x00,0x00,0x40,0x00,0x01,0x02,0x04,0x06,0x07,0x08,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/mtbuf_gfx10.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mtbuf.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/mtbuf_gfx10.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx10_mtbuf.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt
index b110e0342dde6..caf4546e94cfd 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_mubuf.txt
@@ -2284,3 +2284,33 @@
# GFX10: buffer_store_short v255, off, s[12:15], s4 offset:4095 ; encoding: [0xff,0x0f,0x68,0xe0,0x00,0xff,0x03,0x04]
0xff,0x0f,0x68,0xe0,0x00,0xff,0x03,0x04
+
+# GFX10: buffer_atomic_fcmpswap v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0xf8,0xe0,0x00,0x05,0x02,0x03]
+0xff,0x0f,0xf8,0xe0,0x00,0x05,0x02,0x03
+
+# GFX10: buffer_atomic_fcmpswap v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0xf8,0xe0,0x00,0xfe,0x02,0x03]
+0xff,0x0f,0xf8,0xe0,0x00,0xfe,0x02,0x03
+
+# GFX10: buffer_atomic_fcmpswap_x2 v[5:8], off, s[8:11], s3 offset:7 ; encoding: [0x07,0x00,0x78,0xe1,0x00,0x05,0x02,0x03]
+0x07,0x00,0x78,0xe1,0x00,0x05,0x02,0x03
+
+# GFX10: buffer_atomic_fcmpswap_x2 v[5:8], off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x78,0xe1,0x00,0x05,0x02,0x03]
+0xff,0x4f,0x78,0xe1,0x00,0x05,0x02,0x03
+
+# GFX10: buffer_atomic_fmax v5, v0, s[8:11], s3 idxen offset:4095 ; encoding: [0xff,0x2f,0x00,0xe1,0x00,0x05,0x02,0x03]
+0xff,0x2f,0x00,0xe1,0x00,0x05,0x02,0x03
+
+# GFX10: buffer_atomic_fmax_x2 v[5:6], off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x80,0xe1,0x00,0x05,0x02,0x03]
+0xff,0x4f,0x80,0xe1,0x00,0x05,0x02,0x03
+
+# GFX10: buffer_atomic_fmax_x2 v[5:6], off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x80,0xe1,0x00,0x05,0x42,0x03]
+0xff,0x0f,0x80,0xe1,0x00,0x05,0x42,0x03
+
+# GFX10: buffer_atomic_fmin v5, off, s[8:11], s3 ; encoding: [0x00,0x00,0xfc,0xe0,0x00,0x05,0x02,0x03]
+0x00,0x00,0xfc,0xe0,0x00,0x05,0x02,0x03
+
+# GFX10: buffer_atomic_fmin v5, off, s[8:11], s3 offset:7 ; encoding: [0x07,0x00,0xfc,0xe0,0x00,0x05,0x02,0x03]
+0x07,0x00,0xfc,0xe0,0x00,0x05,0x02,0x03
+
+# GFX10: buffer_atomic_fmin_x2 v[5:6], off, ttmp[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x7c,0xe1,0x00,0x05,0x1e,0x03]
+0xff,0x0f,0x7c,0xe1,0x00,0x05,0x1e,0x03
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt
index 09ccb14943eb5..fdcb28ab55a3f 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sop2.txt
@@ -4972,3 +4972,9 @@
# GFX10: s_xor_b64 vcc, s[2:3], s[4:5] ; encoding: [0x02,0x04,0xea,0x89]
0x02,0x04,0xea,0x89
+
+# GFX10: s_ashr_i64 s[0:1], null, s0 ; encoding: [0x7d,0x00,0x80,0x91]
+0x7d,0x00,0x80,0x91
+
+# GFX10: s_and_b64 s[0:1], null, null ; encoding: [0x7d,0x7d,0x80,0x87]
+0x7d,0x7d,0x80,0x87
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt
index c617af7c79ccf..54b9abea720b4 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp16.txt
@@ -71,6 +71,12 @@
# GFX10: v_bfrev_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x70,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x70,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x70,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_ceil_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb8,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xb8,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -140,6 +146,12 @@
# GFX10: v_ceil_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb8,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xb8,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_ceil_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_ceil_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xb8,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_ceil_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x44,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x44,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -209,6 +221,12 @@
# GFX10: v_ceil_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x44,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x44,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_ceil_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_ceil_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cos_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc2,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xc2,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -278,6 +296,12 @@
# GFX10: v_cos_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc2,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xc2,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cos_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cos_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xc2,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cos_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x6c,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -347,6 +371,12 @@
# GFX10: v_cos_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x6c,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cos_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cos_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x6c,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f16_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x14,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x14,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -416,6 +446,12 @@
# GFX10: v_cvt_f16_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x14,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x14,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f16_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f16_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f16_i16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa2,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xa2,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -485,6 +521,12 @@
# GFX10: v_cvt_f16_i16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa2,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xa2,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f16_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f16_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xa2,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f16_u16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa0,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xa0,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -554,6 +596,12 @@
# GFX10: v_cvt_f16_u16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa0,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xa0,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f16_u16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f16_u16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xa0,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f32_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x16,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x16,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -623,6 +671,12 @@
# GFX10: v_cvt_f32_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x16,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x16,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f32_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f32_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f32_i32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x0a,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -692,6 +746,12 @@
# GFX10: v_cvt_f32_i32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x0a,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f32_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f32_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f32_u32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x0c,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -761,6 +821,12 @@
# GFX10: v_cvt_f32_u32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x0c,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f32_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f32_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f32_ubyte0_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x22,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x22,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -830,6 +896,12 @@
# GFX10: v_cvt_f32_ubyte0_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x22,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x22,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f32_ubyte1_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x24,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x24,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -899,6 +971,12 @@
# GFX10: v_cvt_f32_ubyte1_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x24,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x24,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f32_ubyte2_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x26,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x26,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -968,6 +1046,12 @@
# GFX10: v_cvt_f32_ubyte2_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x26,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x26,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_f32_ubyte3_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x28,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x28,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1037,6 +1121,12 @@
# GFX10: v_cvt_f32_ubyte3_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x28,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x28,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_flr_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x1a,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1106,6 +1196,12 @@
# GFX10: v_cvt_flr_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x1a,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_i16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa6,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xa6,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1175,6 +1271,12 @@
# GFX10: v_cvt_i16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa6,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xa6,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xa6,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x10,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x10,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1244,6 +1346,12 @@
# GFX10: v_cvt_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x10,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x10,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_norm_i16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc6,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xc6,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1313,6 +1421,12 @@
# GFX10: v_cvt_norm_i16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc6,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xc6,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xc6,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_norm_u16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc8,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xc8,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1382,6 +1496,12 @@
# GFX10: v_cvt_norm_u16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc8,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xc8,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xc8,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_off_f32_i4_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x1c,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1451,6 +1571,12 @@
# GFX10: v_cvt_off_f32_i4_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x1c,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_rpi_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x18,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x18,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1520,6 +1646,12 @@
# GFX10: v_cvt_rpi_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x18,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x18,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_u16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa4,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xa4,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1589,6 +1721,12 @@
# GFX10: v_cvt_u16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa4,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xa4,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xa4,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_cvt_u32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x0e,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1658,6 +1796,12 @@
# GFX10: v_cvt_u32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x0e,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_cvt_u32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_cvt_u32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_exp_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb0,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xb0,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1727,6 +1871,12 @@
# GFX10: v_exp_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb0,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xb0,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_exp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_exp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xb0,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_exp_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x4a,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1796,6 +1946,12 @@
# GFX10: v_exp_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x4a,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_exp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_exp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x4a,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_ffbh_i32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x76,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x76,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1865,6 +2021,12 @@
# GFX10: v_ffbh_i32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x76,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x76,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_ffbh_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_ffbh_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_ffbh_u32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x72,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x72,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -1934,6 +2096,12 @@
# GFX10: v_ffbh_u32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x72,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x72,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_ffbh_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_ffbh_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_ffbl_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x74,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x74,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2003,6 +2171,12 @@
# GFX10: v_ffbl_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x74,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x74,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_ffbl_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_ffbl_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_floor_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb6,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xb6,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2072,6 +2246,12 @@
# GFX10: v_floor_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb6,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xb6,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_floor_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_floor_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xb6,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_floor_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x48,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x48,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2141,6 +2321,12 @@
# GFX10: v_floor_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x48,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x48,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_floor_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_floor_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_fract_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbe,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xbe,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2210,6 +2396,12 @@
# GFX10: v_fract_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbe,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xbe,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_fract_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_fract_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xbe,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_fract_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x40,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x40,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2279,6 +2471,12 @@
# GFX10: v_fract_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x40,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x40,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_fract_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_fract_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_frexp_exp_i16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb4,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xb4,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2348,6 +2546,12 @@
# GFX10: v_frexp_exp_i16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb4,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xb4,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xb4,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_frexp_exp_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x7e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x7e,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2417,6 +2621,12 @@
# GFX10: v_frexp_exp_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x7e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x7e,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_frexp_mant_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb2,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xb2,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2486,6 +2696,12 @@
# GFX10: v_frexp_mant_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb2,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xb2,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_frexp_mant_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_frexp_mant_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xb2,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_frexp_mant_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x80,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x80,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2555,6 +2771,12 @@
# GFX10: v_frexp_mant_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x80,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x80,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_frexp_mant_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_frexp_mant_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_log_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xae,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xae,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2624,6 +2846,12 @@
# GFX10: v_log_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xae,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xae,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_log_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_log_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xae,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_log_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x4e,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2693,6 +2921,12 @@
# GFX10: v_log_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x4e,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_log_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_log_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_mov_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x02,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2762,6 +2996,81 @@
# GFX10: v_mov_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x02,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mov_b32_dpp v255, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0xfe,0x7f,0x01,0x1b,0x00,0x00]
+0xfa,0x02,0xfe,0x7f,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mov_b32_dpp v5, v255 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0xff,0x1b,0x00,0x00]
+0xfa,0x02,0x0a,0x7e,0xff,0x1b,0x00,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x40,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x40,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x41,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x41,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x01,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x01,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x0f,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x0f,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x11,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x11,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1f,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x1f,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x21,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x21,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x2f,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x2f,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_share:0 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x50,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x50,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_share:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x5f,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x5f,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_xmask:0 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x60,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x60,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 row_xmask:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x6f,0x01,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x6f,0x01,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x10]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x10
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x30]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x30
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0xf0]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0xf0
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x01]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x01
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x03]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x03
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x0f]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x0f
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x08,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x08,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
+# GFX10: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_not_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x6e,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2831,6 +3140,12 @@
# GFX10: v_not_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x6e,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_not_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_not_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_rcp_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa8,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xa8,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2900,6 +3215,12 @@
# GFX10: v_rcp_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa8,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xa8,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_rcp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_rcp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xa8,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_rcp_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x54,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x54,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -2969,6 +3290,12 @@
# GFX10: v_rcp_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x54,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x54,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_rcp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_rcp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_rcp_iflag_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x56,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x56,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3038,6 +3365,12 @@
# GFX10: v_rcp_iflag_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x56,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x56,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_rcp_iflag_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_rcp_iflag_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_rndne_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbc,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xbc,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3107,6 +3440,12 @@
# GFX10: v_rndne_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbc,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xbc,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_rndne_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_rndne_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xbc,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_rndne_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x46,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x46,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3176,6 +3515,12 @@
# GFX10: v_rndne_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x46,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x46,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_rndne_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_rndne_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_rsq_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xac,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xac,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3245,6 +3590,12 @@
# GFX10: v_rsq_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xac,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xac,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_rsq_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_rsq_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xac,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_rsq_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x5c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x5c,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3314,6 +3665,12 @@
# GFX10: v_rsq_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x5c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x5c,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_rsq_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_rsq_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_sin_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc0,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xc0,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3383,6 +3740,12 @@
# GFX10: v_sin_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc0,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xc0,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_sin_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_sin_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xc0,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_sin_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x6a,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3452,6 +3815,12 @@
# GFX10: v_sin_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x6a,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_sin_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_sin_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x6a,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_sqrt_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xaa,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xaa,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3521,6 +3890,12 @@
# GFX10: v_sqrt_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xaa,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xaa,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_sqrt_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_sqrt_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xaa,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_sqrt_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x66,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x66,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3590,6 +3965,12 @@
# GFX10: v_sqrt_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x66,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x66,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_sqrt_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_sqrt_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_trunc_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xba,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0xba,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3659,6 +4040,12 @@
# GFX10: v_trunc_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xba,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0xba,0x0a,0x7e,0xff,0xe4,0x00,0x00
+# GFX10: v_trunc_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_trunc_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xba,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
# GFX10: v_trunc_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x42,0xfe,0x7f,0x01,0xe4,0x00,0x00]
0xfa,0x42,0xfe,0x7f,0x01,0xe4,0x00,0x00
@@ -3727,3 +4114,27 @@
# GFX10: v_trunc_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x42,0x0a,0x7e,0xff,0xe4,0x00,0x00]
0xfa,0x42,0x0a,0x7e,0xff,0xe4,0x00,0x00
+
+# GFX10: v_trunc_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_trunc_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x04,0x00
+
+# GFX10: v_movreld_b32_dpp v1, v0 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x84,0x02,0x7e,0x00,0x1b,0x00,0x00]
+0xfa,0x84,0x02,0x7e,0x00,0x1b,0x00,0x00
+
+# GFX10: v_movrels_b32_dpp v1, v0 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x86,0x02,0x7e,0x00,0x1b,0x04,0x00]
+0xfa,0x86,0x02,0x7e,0x00,0x1b,0x04,0x00
+
+# GFX10: v_movrelsd_2_b32_dpp v0, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x90,0x00,0x7e,0x02,0x1b,0x00,0x00]
+0xfa,0x90,0x00,0x7e,0x02,0x1b,0x00,0x00
+
+# GFX10: v_movrelsd_b32_dpp v0, v255 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x88,0x00,0x7e,0xff,0x1b,0x00,0x00]
+0xfa,0x88,0x00,0x7e,0xff,0x1b,0x00,0x00
+
+# GFX10: v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x00,0x00]
+0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x04,0x00]
+0xfa,0xc4,0x0a,0x7e,0x01,0x1b,0x04,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt
similarity index 60%
rename from llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp8.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt
index 130d9b96aed43..b520dcfe918b7 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_dpp8.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop1_dpp8.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W64 %s
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10 %s
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10 %s
# GFX10: v_mov_b32_dpp v5, v1 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x02,0x0a,0x7e,0x01,0x88,0xc6,0xfa]
0xe9,0x02,0x0a,0x7e,0x01,0x88,0xc6,0xfa
@@ -163,93 +163,6 @@
# GFX10: v_cvt_norm_u16_f16_dpp v5, v1 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0xc8,0x0a,0x7e,0x01,0x88,0xc6,0xfa]
0xe9,0xc8,0x0a,0x7e,0x01,0x88,0xc6,0xfa
-# GFX10: v_add_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_sub_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x08,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x08,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_subrev_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x0a,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x0a,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_legacy_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x0e,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x0e,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x10,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x10,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_i32_i24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x12,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x12,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x14,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x14,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_u32_u24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x16,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x16,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x18,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x18,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_min_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x1e,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x1e,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_max_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x20,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x20,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_min_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x22,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x22,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_max_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x24,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x24,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_min_u32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x26,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x26,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_max_u32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x28,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x28,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_lshrrev_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x2c,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x2c,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_ashrrev_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x30,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x30,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_lshlrev_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x34,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x34,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_and_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x36,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x36,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_or_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x38,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x38,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_xor_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x3a,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x3a,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_xnor_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x3c,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x3c,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_add_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x64,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x64,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_sub_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x66,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x66,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_subrev_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x68,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x68,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x6a,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x6a,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_max_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x72,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x72,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_min_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x74,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x74,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_ldexp_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x76,0x01,0x88,0xc6,0xfa]
-0xe9,0x04,0x0a,0x76,0x01,0x88,0xc6,0xfa
-
# GFX10: v_mov_b32_dpp v5, v1 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x02,0x0a,0x7e,0x01,0x88,0xc6,0xfa]
0xea,0x02,0x0a,0x7e,0x01,0x88,0xc6,0xfa
@@ -412,133 +325,6 @@
# GFX10: v_cvt_norm_u16_f16_dpp v5, v1 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0xc8,0x0a,0x7e,0x01,0x88,0xc6,0xfa]
0xea,0xc8,0x0a,0x7e,0x01,0x88,0xc6,0xfa
-# GFX10: v_add_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_sub_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x08,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x08,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_subrev_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x0a,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x0a,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_legacy_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x0e,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x0e,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x10,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x10,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_i32_i24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x12,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x12,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x14,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x14,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_u32_u24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x16,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x16,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x18,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x18,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_min_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x1e,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x1e,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_max_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x20,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x20,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_min_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x22,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x22,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_max_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x24,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x24,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_min_u32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x26,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x26,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_max_u32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x28,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x28,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_lshrrev_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x2c,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x2c,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_ashrrev_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x30,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x30,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_lshlrev_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x34,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x34,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_and_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x36,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x36,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_or_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x38,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x38,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_xor_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x3a,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x3a,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_xnor_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x3c,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x3c,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_add_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x64,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x64,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_sub_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x66,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x66,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_subrev_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x68,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x68,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_mul_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x6a,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x6a,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_max_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x72,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x72,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_min_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x74,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x74,0x01,0x88,0xc6,0xfa
-
-# GFX10: v_ldexp_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x76,0x01,0x88,0xc6,0xfa]
-0xea,0x04,0x0a,0x76,0x01,0x88,0xc6,0xfa
-
-# W32: v_add_co_ci_u32_dpp v0, vcc_lo, v0, v0, vcc_lo dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x00,0x00,0x50,0x00,0x77,0x39,0x05]
-# W64: v_add_co_ci_u32_dpp v0, vcc, v0, v0, vcc dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x00,0x00,0x50,0x00,0x77,0x39,0x05]
-0xe9,0x00,0x00,0x50,0x00,0x77,0x39,0x05
-
-# W32: v_add_co_ci_u32_dpp v0, vcc_lo, v0, v0, vcc_lo dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x50,0x00,0x77,0x39,0x05]
-# W64: v_add_co_ci_u32_dpp v0, vcc, v0, v0, vcc dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x50,0x00,0x77,0x39,0x05]
-0xea,0x00,0x00,0x50,0x00,0x77,0x39,0x05
-
-# W32: v_sub_co_ci_u32_dpp v0, vcc_lo, v0, v0, vcc_lo dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x52,0x00,0x77,0x39,0x05]
-# W64: v_sub_co_ci_u32_dpp v0, vcc, v0, v0, vcc dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x52,0x00,0x77,0x39,0x05]
-0xea,0x00,0x00,0x52,0x00,0x77,0x39,0x05
-
-# W32: v_subrev_co_ci_u32_dpp v0, vcc_lo, v0, v0, vcc_lo dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x54,0x00,0x77,0x39,0x05]
-# W64: v_subrev_co_ci_u32_dpp v0, vcc, v0, v0, vcc dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x54,0x00,0x77,0x39,0x05]
-0xea,0x00,0x00,0x54,0x00,0x77,0x39,0x05
-
-# GFX10: v_add_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x4a,0x01,0x77,0x39,0x05]
-0xe9,0x04,0x0a,0x4a,0x01,0x77,0x39,0x05
-
-# GFX10: v_add_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x4a,0x01,0x77,0x39,0x05]
-0xea,0x04,0x0a,0x4a,0x01,0x77,0x39,0x05
-
-# GFX10: v_sub_nc_u32_dpp v5, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x0b,0x4c,0x01,0x77,0x39,0x05]
-0xe9,0xfe,0x0b,0x4c,0x01,0x77,0x39,0x05
-
-# GFX10: v_sub_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x4c,0x01,0x77,0x39,0x05]
-0xea,0x04,0x0a,0x4c,0x01,0x77,0x39,0x05
-
-# GFX10: v_subrev_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x4e,0x01,0x77,0x39,0x05]
-0xe9,0x04,0x0a,0x4e,0x01,0x77,0x39,0x05
-
-# GFX10: v_subrev_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x4e,0x01,0x77,0x39,0x05]
-0xea,0x04,0x0a,0x4e,0x01,0x77,0x39,0x05
-
-# GFX10: v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x3e,0x01,0x77,0x39,0x05]
-0xe9,0x04,0x0a,0x3e,0x01,0x77,0x39,0x05
-
-# GFX10: v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x3e,0x01,0x77,0x39,0x05]
-0xea,0x04,0x0a,0x3e,0x01,0x77,0x39,0x05
-
# GFX10: v_movreld_b32_dpp v0, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x84,0x00,0x7e,0x01,0x77,0x39,0x05]
0xea,0x84,0x00,0x7e,0x01,0x77,0x39,0x05
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt
index 71746aa8c5f3e..164585bf81815 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp16.txt
@@ -1,5 +1,5 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX10 %s
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W32 %s
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX10,W64 %s
# GFX10: v_add_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x65,0x01,0xe4,0x00,0x00]
@@ -80,6 +80,12 @@
# GFX10: v_add_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x64,0x01,0xe4,0x20,0x00
+# GFX10: v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0x00
+
+# GFX10: v_add_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x64,0x01,0x1b,0x04,0x00
+
# GFX10: v_add_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x07,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x07,0x01,0xe4,0x00,0x00
@@ -164,6 +170,24 @@
# GFX10: v_add_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x06,0x01,0xe4,0x20,0x00
+# GFX10: v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0x00
+
+# GFX10: v_add_f32_dpp v5, -v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x10,0x00]
+0xfa,0x04,0x0a,0x06,0x01,0x1b,0x10,0x00
+
+# GFX10: v_add_f32_dpp v5, |v1|, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x20,0x00]
+0xfa,0x04,0x0a,0x06,0x01,0x1b,0x20,0x00
+
+# GFX10: v_add_f32_dpp v5, v1, -v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x40,0x00]
+0xfa,0x04,0x0a,0x06,0x01,0x1b,0x40,0x00
+
+# GFX10: v_add_f32_dpp v5, v1, |v2| quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x80,0x00]
+0xfa,0x04,0x0a,0x06,0x01,0x1b,0x80,0x00
+
+# GFX10: v_add_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x06,0x01,0x1b,0x04,0x00
+
# GFX10: v_and_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x37,0x01,0xe4,0x00,0x00
@@ -236,6 +260,12 @@
# GFX10: v_and_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x36,0xff,0xe4,0x00,0x00
+# GFX10: v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0x00
+
+# GFX10: v_and_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x36,0x01,0x1b,0x04,0x00
+
# GFX10: v_ashrrev_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x31,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x31,0x01,0xe4,0x00,0x00
@@ -308,6 +338,12 @@
# GFX10: v_ashrrev_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x30,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x30,0xff,0xe4,0x00,0x00
+# GFX10: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0x00
+
+# GFX10: v_ashrrev_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x30,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x30,0x01,0x1b,0x04,0x00
+
# GFX10: v_ldexp_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x77,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x77,0x01,0xe4,0x00,0x00
@@ -386,6 +422,12 @@
# GFX10: v_ldexp_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x76,0x01,0xe4,0x20,0x00
+# GFX10: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0x00
+
+# GFX10: v_ldexp_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x76,0x01,0x1b,0x04,0x00
+
# GFX10: v_lshlrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x35,0x01,0xe4,0x00,0x00
@@ -458,6 +500,12 @@
# GFX10: v_lshlrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x34,0xff,0xe4,0x00,0x00
+# GFX10: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0x00
+
+# GFX10: v_lshlrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x34,0x01,0x1b,0x04,0x00
+
# GFX10: v_lshrrev_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x2d,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x2d,0x01,0xe4,0x00,0x00
@@ -530,6 +578,12 @@
# GFX10: v_lshrrev_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x2c,0xff,0xe4,0x00,0x00
+# GFX10: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x00,0x00
+
+# GFX10: v_lshrrev_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x2c,0x01,0x1b,0x04,0x00
+
# GFX10: v_max_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x73,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x73,0x01,0xe4,0x00,0x00
@@ -608,6 +662,12 @@
# GFX10: v_max_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x72,0x01,0xe4,0x20,0x00
+# GFX10: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0x00
+
+# GFX10: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x72,0x01,0x1b,0x04,0x00
+
# GFX10: v_max_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x21,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x21,0x01,0xe4,0x00,0x00
@@ -692,6 +752,12 @@
# GFX10: v_max_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x20,0x01,0xe4,0x20,0x00
+# GFX10: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0x00
+
+# GFX10: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x20,0x01,0x1b,0x04,0x00
+
# GFX10: v_max_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x25,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x25,0x01,0xe4,0x00,0x00
@@ -764,6 +830,12 @@
# GFX10: v_max_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x24,0xff,0xe4,0x00,0x00
+# GFX10: v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0x00
+
+# GFX10: v_max_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x24,0x01,0x1b,0x04,0x00
+
# GFX10: v_max_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x29,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x29,0x01,0xe4,0x00,0x00
@@ -836,6 +908,12 @@
# GFX10: v_max_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x28,0xff,0xe4,0x00,0x00
+# GFX10: v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0x00
+
+# GFX10: v_max_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x28,0x01,0x1b,0x04,0x00
+
# GFX10: v_min_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x75,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x75,0x01,0xe4,0x00,0x00
@@ -914,6 +992,12 @@
# GFX10: v_min_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x74,0x01,0xe4,0x20,0x00
+# GFX10: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0x00
+
+# GFX10: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x74,0x01,0x1b,0x04,0x00
+
# GFX10: v_min_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x1f,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x1f,0x01,0xe4,0x00,0x00
@@ -998,6 +1082,12 @@
# GFX10: v_min_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x20,0x00
+# GFX10: v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_min_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x04,0x00
+
# GFX10: v_min_i32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x23,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x23,0x01,0xe4,0x00,0x00
@@ -1070,6 +1160,12 @@
# GFX10: v_min_i32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x22,0xff,0xe4,0x00,0x00
+# GFX10: v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0x00
+
+# GFX10: v_min_i32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x22,0x01,0x1b,0x04,0x00
+
# GFX10: v_min_u32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x27,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x27,0x01,0xe4,0x00,0x00
@@ -1142,6 +1238,12 @@
# GFX10: v_min_u32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x26,0xff,0xe4,0x00,0x00
+# GFX10: v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0x00
+
+# GFX10: v_min_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x26,0x01,0x1b,0x04,0x00
+
# GFX10: v_mul_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x6b,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x6b,0x01,0xe4,0x00,0x00
@@ -1220,6 +1322,12 @@
# GFX10: v_mul_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x20,0x00
+# GFX10: v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mul_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x04,0x00
+
# GFX10: v_mul_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x11,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x11,0x01,0xe4,0x00,0x00
@@ -1304,6 +1412,12 @@
# GFX10: v_mul_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x10,0x01,0xe4,0x20,0x00
+# GFX10: v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mul_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x10,0x01,0x1b,0x04,0x00
+
# GFX10: v_mul_hi_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x15,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x15,0x01,0xe4,0x00,0x00
@@ -1376,6 +1490,12 @@
# GFX10: v_mul_hi_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x14,0xff,0xe4,0x00,0x00
+# GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x14,0x01,0x1b,0x04,0x00
+
# GFX10: v_mul_hi_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x19,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x19,0x01,0xe4,0x00,0x00
@@ -1448,6 +1568,12 @@
# GFX10: v_mul_hi_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x18,0xff,0xe4,0x00,0x00
+# GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x18,0x01,0x1b,0x04,0x00
+
# GFX10: v_mul_i32_i24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x13,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x13,0x01,0xe4,0x00,0x00
@@ -1520,6 +1646,12 @@
# GFX10: v_mul_i32_i24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x12,0xff,0xe4,0x00,0x00
+# GFX10: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mul_i32_i24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x12,0x01,0x1b,0x04,0x00
+
# GFX10: v_mul_legacy_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x0f,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x0f,0x01,0xe4,0x00,0x00
@@ -1604,6 +1736,12 @@
# GFX10: v_mul_legacy_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x20,0x00
+# GFX10: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mul_legacy_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x04,0x00
+
# GFX10: v_mul_u32_u24_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x17,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x17,0x01,0xe4,0x00,0x00
@@ -1676,6 +1814,12 @@
# GFX10: v_mul_u32_u24_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x16,0xff,0xe4,0x00,0x00
+# GFX10: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mul_u32_u24_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x16,0x01,0x1b,0x04,0x00
+
# GFX10: v_or_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x39,0x01,0xe4,0x00,0x00
@@ -1748,6 +1892,12 @@
# GFX10: v_or_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x38,0xff,0xe4,0x00,0x00
+# GFX10: v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0x00
+
+# GFX10: v_or_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x38,0x01,0x1b,0x04,0x00
+
# GFX10: v_sub_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x67,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x67,0x01,0xe4,0x00,0x00
@@ -1826,6 +1976,12 @@
# GFX10: v_sub_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x66,0x01,0xe4,0x20,0x00
+# GFX10: v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0x00
+
+# GFX10: v_sub_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x66,0x01,0x1b,0x04,0x00
+
# GFX10: v_sub_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x09,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x09,0x01,0xe4,0x00,0x00
@@ -1910,6 +2066,12 @@
# GFX10: v_sub_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x08,0x01,0xe4,0x20,0x00
+# GFX10: v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0x00
+
+# GFX10: v_sub_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x08,0x01,0x1b,0x04,0x00
+
# GFX10: v_subrev_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x69,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x69,0x01,0xe4,0x00,0x00
@@ -1988,6 +2150,12 @@
# GFX10: v_subrev_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x68,0x01,0xe4,0x20,0x00
+# GFX10: v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0x00
+
+# GFX10: v_subrev_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x68,0x01,0x1b,0x04,0x00
+
# GFX10: v_subrev_f32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x0b,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x0b,0x01,0xe4,0x00,0x00
@@ -2072,6 +2240,12 @@
# GFX10: v_subrev_f32_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x20,0x00]
0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x20,0x00
+# GFX10: v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0x00
+
+# GFX10: v_subrev_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x04,0x00
+
# GFX10: v_xnor_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x3d,0x01,0xe4,0x00,0x00
@@ -2144,6 +2318,12 @@
# GFX10: v_xnor_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x3c,0xff,0xe4,0x00,0x00
+# GFX10: v_xnor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0x00
+
+# GFX10: v_xnor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x04,0x00
+
# GFX10: v_xor_b32_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00]
0xfa,0x04,0xfe,0x3b,0x01,0xe4,0x00,0x00
@@ -2215,3 +2395,72 @@
# GFX10: v_xor_b32_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00]
0xfa,0x04,0x0a,0x3a,0xff,0xe4,0x00,0x00
+
+# GFX10: v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0x00
+
+# GFX10: v_xor_b32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x04,0x00
+
+# W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
+# W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x50,0x01,0x1b,0x00,0x00
+
+# W32: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x04,0x00]
+# W64: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x50,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x50,0x01,0x1b,0x04,0x00
+
+# GFX10: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x00,0x00
+
+# GFX10: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x08,0x00]
+0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x08,0x00
+
+# GFX10: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x04,0x00
+
+# GFX10: v_fmac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0x00
+
+# GFX10: v_fmac_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x04,0x00
+
+# GFX10: v_fmac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0x00
+
+# GFX10: v_fmac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x56,0x01,0x1b,0x04,0x00
+
+# GFX10: v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x00,0x00
+
+# GFX10: v_mac_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x3e,0x01,0x1b,0x04,0x00
+
+# W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
+# W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x52,0x01,0x1b,0x00,0x00
+
+# W32: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x04,0x00]
+# W64: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x52,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x52,0x01,0x1b,0x04,0x00
+
+# GFX10: v_sub_nc_u32_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00]
+0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0x00
+
+# GFX10: v_sub_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x04,0x00
+
+# W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
+# W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00]
+0xfa,0x04,0x0a,0x54,0x01,0x1b,0x00,0x00
+
+# W32: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x04,0x00]
+# W64: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x54,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x54,0x01,0x1b,0x04,0x00
+
+# GFX10: v_subrev_nc_u32_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00]
+0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0x00
+
+# GFX10: v_subrev_nc_u32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x04,0x00]
+0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x04,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt
new file mode 100644
index 0000000000000..cee1163a9f052
--- /dev/null
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop2_dpp8.txt
@@ -0,0 +1,224 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W32 %s
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10,W64 %s
+
+# GFX10: v_add_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_sub_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x08,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x08,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_subrev_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x0a,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x0a,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_legacy_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x0e,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x0e,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x10,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x10,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_i32_i24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x12,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x12,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x14,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x14,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_u32_u24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x16,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x16,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x18,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x18,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_min_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x1e,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x1e,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_max_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x20,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x20,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_min_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x22,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x22,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_max_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x24,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x24,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_min_u32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x26,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x26,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_max_u32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x28,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x28,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_lshrrev_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x2c,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x2c,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_ashrrev_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x30,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x30,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_lshlrev_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x34,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x34,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_and_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x36,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x36,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_or_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x38,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x38,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_xor_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x3a,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x3a,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_xnor_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x3c,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x3c,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_add_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x64,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x64,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_sub_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x66,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x66,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_subrev_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x68,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x68,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x6a,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x6a,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_max_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x72,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x72,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_min_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x74,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x74,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_ldexp_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] ; encoding: [0xe9,0x04,0x0a,0x76,0x01,0x88,0xc6,0xfa]
+0xe9,0x04,0x0a,0x76,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_add_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x06,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_sub_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x08,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x08,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_subrev_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x0a,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x0a,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_legacy_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x0e,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x0e,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x10,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x10,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_i32_i24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x12,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x12,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_hi_i32_i24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x14,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x14,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_u32_u24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x16,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x16,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_hi_u32_u24_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x18,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x18,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_min_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x1e,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x1e,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_max_f32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x20,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x20,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_min_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x22,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x22,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_max_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x24,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x24,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_min_u32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x26,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x26,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_max_u32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x28,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x28,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_lshrrev_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x2c,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x2c,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_ashrrev_i32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x30,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x30,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_lshlrev_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x34,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x34,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_and_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x36,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x36,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_or_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x38,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x38,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_xor_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x3a,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x3a,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_xnor_b32_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x3c,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x3c,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_add_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x64,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x64,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_sub_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x66,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x66,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_subrev_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x68,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x68,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_mul_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x6a,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x6a,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_max_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x72,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x72,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_min_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x74,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x74,0x01,0x88,0xc6,0xfa
+
+# GFX10: v_ldexp_f16_dpp v5, v1, v2 dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x0a,0x76,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x0a,0x76,0x01,0x88,0xc6,0xfa
+
+# W32: v_add_co_ci_u32_dpp v0, vcc_lo, v0, v0, vcc_lo dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x00,0x00,0x50,0x00,0x77,0x39,0x05]
+# W64: v_add_co_ci_u32_dpp v0, vcc, v0, v0, vcc dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x00,0x00,0x50,0x00,0x77,0x39,0x05]
+0xe9,0x00,0x00,0x50,0x00,0x77,0x39,0x05
+
+# W32: v_add_co_ci_u32_dpp v0, vcc_lo, v0, v0, vcc_lo dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x50,0x00,0x77,0x39,0x05]
+# W64: v_add_co_ci_u32_dpp v0, vcc, v0, v0, vcc dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x50,0x00,0x77,0x39,0x05]
+0xea,0x00,0x00,0x50,0x00,0x77,0x39,0x05
+
+# W32: v_sub_co_ci_u32_dpp v0, vcc_lo, v0, v0, vcc_lo dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x52,0x00,0x77,0x39,0x05]
+# W64: v_sub_co_ci_u32_dpp v0, vcc, v0, v0, vcc dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x52,0x00,0x77,0x39,0x05]
+0xea,0x00,0x00,0x52,0x00,0x77,0x39,0x05
+
+# W32: v_subrev_co_ci_u32_dpp v0, vcc_lo, v0, v0, vcc_lo dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x54,0x00,0x77,0x39,0x05]
+# W64: v_subrev_co_ci_u32_dpp v0, vcc, v0, v0, vcc dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x00,0x00,0x54,0x00,0x77,0x39,0x05]
+0xea,0x00,0x00,0x54,0x00,0x77,0x39,0x05
+
+# GFX10: v_add_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x4a,0x01,0x77,0x39,0x05]
+0xe9,0x04,0x0a,0x4a,0x01,0x77,0x39,0x05
+
+# GFX10: v_add_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x4a,0x01,0x77,0x39,0x05]
+0xea,0x04,0x0a,0x4a,0x01,0x77,0x39,0x05
+
+# GFX10: v_sub_nc_u32_dpp v5, v1, v255 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0xfe,0x0b,0x4c,0x01,0x77,0x39,0x05]
+0xe9,0xfe,0x0b,0x4c,0x01,0x77,0x39,0x05
+
+# GFX10: v_sub_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x4c,0x01,0x77,0x39,0x05]
+0xea,0x04,0x0a,0x4c,0x01,0x77,0x39,0x05
+
+# GFX10: v_subrev_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x4e,0x01,0x77,0x39,0x05]
+0xe9,0x04,0x0a,0x4e,0x01,0x77,0x39,0x05
+
+# GFX10: v_subrev_nc_u32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x4e,0x01,0x77,0x39,0x05]
+0xea,0x04,0x0a,0x4e,0x01,0x77,0x39,0x05
+
+# GFX10: v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x0a,0x3e,0x01,0x77,0x39,0x05]
+0xe9,0x04,0x0a,0x3e,0x01,0x77,0x39,0x05
+
+# GFX10: v_mac_f32_dpp v5, v1, v2 dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x04,0x0a,0x3e,0x01,0x77,0x39,0x05]
+0xea,0x04,0x0a,0x3e,0x01,0x77,0x39,0x05
+
+# W32: v_cndmask_b32_dpp v0, v1, v2, vcc_lo dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x00,0x02,0x01,0x77,0x39,0x05]
+# W64: v_cndmask_b32_dpp v0, v1, v2, vcc dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x04,0x00,0x02,0x01,0x77,0x39,0x05]
+0xe9,0x04,0x00,0x02,0x01,0x77,0x39,0x05
+
+# W32: v_cndmask_b32_dpp v0, v1, v2, vcc_lo dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x00,0x02,0x01,0x88,0xc6,0xfa]
+# W64: v_cndmask_b32_dpp v0, v1, v2, vcc dpp8:[0,1,2,3,4,5,6,7] fi:1 ; encoding: [0xea,0x04,0x00,0x02,0x01,0x88,0xc6,0xfa]
+0xea,0x04,0x00,0x02,0x01,0x88,0xc6,0xfa
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
index 506db56ef2701..b76ad301a6e33 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
@@ -7104,3 +7104,23 @@
# GFX10: v_cmpx_u_f64_e64 vcc, v[2:3] ; encoding: [0x7e,0x00,0x38,0xd4,0x6a,0x04,0x02,0x00]
0x7e,0x00,0x38,0xd4,0x6a,0x04,0x02,0x00
+
+#===------------------------------------------------------------------------===#
+# Regular v_cmpx encoding
+#===------------------------------------------------------------------------===#
+
+# GFX10: v_cmpx_eq_f16_e64 s1, v2
+0x00,0x00,0xda,0xd4,0x01,0x04,0x02,0x00
+
+# GFX10: v_cmpx_class_f32_e64 v0, 1
+0x00,0x00,0x98,0xd4,0x00,0x03,0x01,0x00
+
+#===------------------------------------------------------------------------===#
+# v_cmpx with arbitrary DST value should also be decodable
+#===------------------------------------------------------------------------===#
+
+# GFX10: v_cmpx_eq_f16_e64 s1, v2
+0x7e,0x00,0xda,0xd4,0x01,0x04,0x02,0x00
+
+# GFX10: v_cmpx_class_f32_e64 v0, 1
+0x7e,0x00,0x98,0xd4,0x00,0x03,0x01,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/literalv216_gfx10.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/literalv216_gfx10.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt
index fd3aca0a2b6e2..3e04f424e64fa 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopc_sdwa.txt
@@ -114,6 +114,10 @@
# W64: v_cmp_class_f32_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x10,0x7d,0x01,0x00,0x06,0x06]
0xf9,0x04,0x10,0x7d,0x01,0x00,0x06,0x06
+# W32: v_cmp_class_f16_sdwa ttmp14, v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x1e,0x7d,0x01,0xfa,0x06,0x06]
+# W64: v_cmp_class_f16_sdwa ttmp[14:15], v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x1e,0x7d,0x01,0xfa,0x06,0x06]
+0xf9,0x04,0x1e,0x7d,0x01,0xfa,0x06,0x06
+
# W32: v_cmp_eq_f16_sdwa s100, v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x94,0x7d,0x01,0xe4,0x06,0x06]
# W64: v_cmp_eq_f16_sdwa s[100:101], v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x94,0x7d,0x01,0xe4,0x06,0x06]
0xf9,0x04,0x94,0x7d,0x01,0xe4,0x06,0x06
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt
index d0d231455c05e..01973a89ba63e 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_vopcx_sdwa.txt
@@ -4513,3 +4513,26 @@
# GFX10: v_cmpx_u_f32_sdwa |v1|, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x30,0x7c,0x01,0x00,0x26,0x06]
0xf9,0x04,0x30,0x7c,0x01,0x00,0x26,0x06
+
+#===------------------------------------------------------------------------===#
+# Regular v_cmpx encoding
+#===------------------------------------------------------------------------===#
+
+# GFX10: v_cmpx_eq_f16_sdwa -v1, v2 src0_sel:DWORD src1_sel:DWORD
+0xf9,0x04,0xb4,0x7d,0x01,0x00,0x16,0x06
+
+# GFX10: v_cmpx_class_f32_sdwa v0, 1 src0_sel:WORD_1 src1_sel:DWORD
+0xf9,0x02,0x31,0x7d,0x00,0x00,0x05,0x86
+
+#===------------------------------------------------------------------------===#
+# v_cmpx with arbitrary DST value should also be decodable
+#===------------------------------------------------------------------------===#
+
+# GFX10: v_cmpx_eq_f16_sdwa -v1, v2 src0_sel:DWORD src1_sel:DWORD
+0xf9,0x04,0xb4,0x7d,0x01,0x7e,0x16,0x06
+
+# GFX10: v_cmpx_class_f32_sdwa v0, 1 src0_sel:WORD_1 src1_sel:DWORD
+0xf9,0x02,0x31,0x7d,0x00,0x7e,0x05,0x86
+
+# GFX10: v_cmpx_class_f32_sdwa v0, 1 src0_sel:WORD_1 src1_sel:DWORD
+0xf9,0x02,0x31,0x7d,0x00,0x7d,0x05,0x86
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx90a_dasm_features.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/gfx90a_dasm_features.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx940_dasm_features.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt
similarity index 100%
rename from llvm/test/MC/Disassembler/AMDGPU/gfx940_dasm_features.txt
rename to llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt
diff --git a/llvm/test/MC/Disassembler/AMDGPU/mimg_gfx10.txt b/llvm/test/MC/Disassembler/AMDGPU/mimg_gfx10.txt
deleted file mode 100644
index cba01fb41ed6a..0000000000000
--- a/llvm/test/MC/Disassembler/AMDGPU/mimg_gfx10.txt
+++ /dev/null
@@ -1,223 +0,0 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX10
-
-# GFX10: image_load v[4:6], v238, s[28:35] dmask:0x7 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x17,0x00,0xf0,0xee,0x04,0x07,0x00]
-0x00,0x17,0x00,0xf0,0xee,0x04,0x07,0x00
-
-# GFX10: image_load_pck v5, v0, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D glc ; encoding: [0x00,0x21,0x08,0xf0,0x00,0x05,0x02,0x00]
-0x00,0x21,0x08,0xf0,0x00,0x05,0x02,0x00
-
-# GFX10: image_load_pck_sgn v5, v0, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D lwe ; encoding: [0x00,0x01,0x0e,0xf0,0x00,0x05,0x02,0x00]
-0x00,0x01,0x0e,0xf0,0x00,0x05,0x02,0x00
-
-# GFX10: image_load_mip v5, v[0:1], s[8:15] dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x00,0x04,0xf0,0x00,0x05,0x02,0x00]
-0x00,0x00,0x04,0xf0,0x00,0x05,0x02,0x00
-
-# GFX10: image_load_mip_pck v5, v[1:2], s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x01,0x10,0xf0,0x01,0x05,0x02,0x00]
-0x00,0x01,0x10,0xf0,0x01,0x05,0x02,0x00
-
-# GFX10: image_load_mip_pck_sgn v[4:5], v[0:1], s[8:15] dmask:0x5 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x05,0x14,0xf0,0x00,0x04,0x02,0x00]
-0x00,0x05,0x14,0xf0,0x00,0x04,0x02,0x00
-
-# GFX10: image_store v[192:194], v238, s[28:35] dmask:0x7 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x17,0x20,0xf0,0xee,0xc0,0x07,0x00]
-0x00,0x17,0x20,0xf0,0xee,0xc0,0x07,0x00
-
-# GFX10: image_store_pck v1, v2, s[12:19] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x28,0xf0,0x02,0x01,0x03,0x00]
-0x00,0x51,0x28,0xf0,0x02,0x01,0x03,0x00
-
-# GFX10: image_store_mip v1, v[2:3], s[12:19] dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x00,0x24,0xf0,0x02,0x01,0x03,0x00]
-0x00,0x00,0x24,0xf0,0x02,0x01,0x03,0x00
-
-# GFX10: image_store_mip_pck v252, v[2:3], s[12:19] dmask:0x1 dim:SQ_RSRC_IMG_1D r128 ; encoding: [0x00,0x81,0x2c,0xf0,0x02,0xfc,0x03,0x00]
-0x00,0x81,0x2c,0xf0,0x02,0xfc,0x03,0x00
-
-# GFX10: image_atomic_sub v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc ; encoding: [0x00,0x31,0x48,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x31,0x48,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_and v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x60,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x60,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_cmpswap v[4:5], v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc ; encoding: [0x00,0x31,0x40,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x31,0x40,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_add v[4:5], v192, s[28:35] dmask:0x3 dim:SQ_RSRC_IMG_1D unorm glc ; encoding: [0x00,0x33,0x44,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x33,0x44,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_or v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x64,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x64,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_xor v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x68,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x68,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_sub v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x48,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x48,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_smin v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x50,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x50,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_smax v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x58,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x58,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_umin v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x54,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x54,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_umax v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x5c,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x5c,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_inc v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x6c,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x6c,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_atomic_dec v4, v192, s[28:35] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm ; encoding: [0x00,0x11,0x70,0xf0,0xc0,0x04,0x07,0x00]
-0x00,0x11,0x70,0xf0,0xc0,0x04,0x07,0x00
-
-# GFX10: image_get_resinfo v5, v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x01,0x38,0xf0,0x01,0x05,0x02,0x00]
-0x00,0x01,0x38,0xf0,0x01,0x05,0x02,0x00
-
-# GFX10: image_sample v5, v0, s[8:15], s[12:15] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x01,0x80,0xf0,0x00,0x05,0x62,0x00]
-0x00,0x01,0x80,0xf0,0x00,0x05,0x62,0x00
-
-# GFX10: image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
-0x08,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40
-
-# GFX10: image_load v[0:4], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm tfe ; encoding: [0x08,0x1f,0x01,0xf0,0x00,0x00,0x00,0x00]
-0x08,0x1f,0x01,0xf0,0x00,0x00,0x00,0x00
-
-# GFX10: image_load v[0:4], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 tfe ; encoding: [0x08,0x1f,0x01,0xf0,0x00,0x00,0x00,0x40]
-0x08,0x1f,0x01,0xf0,0x00,0x00,0x00,0x40
-
-# GFX10: image_load v1, v1, s[16:23] dmask:0x1 dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x01,0x00,0xf0,0x01,0x01,0x04,0x40]
-0x08,0x01,0x00,0xf0,0x01,0x01,0x04,0x40
-
-# GFX10: image_load v[1:2], v1, s[16:23] dmask:0x1 dim:SQ_RSRC_IMG_2D a16 tfe ; encoding: [0x08,0x01,0x01,0xf0,0x01,0x01,0x04,0x40]
-0x08,0x01,0x01,0xf0,0x01,0x01,0x04,0x40
-
-# GFX10: image_load v1, v1, s[16:23] dmask:0x1 dim:SQ_RSRC_IMG_2D a16 lwe ; encoding: [0x08,0x01,0x02,0xf0,0x01,0x01,0x04,0x40]
-0x08,0x01,0x02,0xf0,0x01,0x01,0x04,0x40
-
-# GFX10: image_load v[1:2], v1, s[16:23] dmask:0x1 dim:SQ_RSRC_IMG_2D a16 tfe lwe ; encoding: [0x08,0x01,0x03,0xf0,0x01,0x01,0x04,0x40]
-0x08,0x01,0x03,0xf0,0x01,0x01,0x04,0x40
-
-# GFX10: image_load v[1:2], v1, s[16:23] dmask:0x3 dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x03,0x00,0xf0,0x01,0x01,0x04,0x40]
-0x08,0x03,0x00,0xf0,0x01,0x01,0x04,0x40
-
-# GFX10: image_load v[1:4], v1, s[16:23] dmask:0x7 dim:SQ_RSRC_IMG_2D a16 tfe ; encoding: [0x08,0x07,0x01,0xf0,0x01,0x01,0x04,0x40]
-0x08,0x07,0x01,0xf0,0x01,0x01,0x04,0x40
-
-# GFX10: image_load v[1:4], v1, s[16:23] dmask:0xf dim:SQ_RSRC_IMG_2D a16 lwe ; encoding: [0x08,0x0f,0x02,0xf0,0x01,0x01,0x04,0x40]
-0x08,0x0f,0x02,0xf0,0x01,0x01,0x04,0x40
-
-# GFX10: image_load v[1:3], v1, s[16:23] dmask:0x5 dim:SQ_RSRC_IMG_2D a16 tfe lwe ; encoding: [0x08,0x05,0x03,0xf0,0x01,0x01,0x04,0x40]
-0x08,0x05,0x03,0xf0,0x01,0x01,0x04,0x40
-
-# GFX10: image_sample_d v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40]
-0x00,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_d v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40]
-0x08,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_d v[0:3], [v0, v1, v2, v3, v4, v5, v6, v8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D a16 ; encoding: [0x14,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00]
-0x14,0x0f,0x88,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00
-
-# GFX10: image_sample_c_d v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x40]
-0x00,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_c_d v[0:3], v[0:5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x40]
-0x08,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_d_cl v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x40]
-0x00,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_d_cl v[0:3], [v0, v1, v2, v3, v4, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x0c,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x06,0x00,0x00,0x00]
-0x0c,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x06,0x00,0x00,0x00
-
-# GFX10: image_sample_c_d_cl v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xac,0xf0,0x00,0x00,0x40,0x40]
-0x00,0x0f,0xac,0xf0,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_c_d_cl v[0:3], [v0, v1, v2, v3, v4, v5, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x0c,0x0f,0xac,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x07,0x00,0x00]
-0x0c,0x0f,0xac,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x07,0x00,0x00
-
-# GFX10: image_sample_cd v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x40]
-0x00,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_cd v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x40]
-0x08,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_c_cd v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x40]
-0x00,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_c_cd v[0:3], v[0:5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x08,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x40]
-0x08,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_cd_cl v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x40]
-0x00,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_cd_cl v[0:3], [v0, v1, v2, v3, v4, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x0c,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x06,0x00,0x00,0x00]
-0x0c,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x06,0x00,0x00,0x00
-
-# GFX10: image_sample_c_cd_cl v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16 ; encoding: [0x00,0x0f,0xac,0xf1,0x00,0x00,0x40,0x40]
-0x00,0x0f,0xac,0xf1,0x00,0x00,0x40,0x40
-
-# GFX10: image_sample_c_cd_cl v[0:3], [v0, v1, v2, v3, v4, v5, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16 ; encoding: [0x0c,0x0f,0xac,0xf1,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x07,0x00,0x00]
-0x0c,0x0f,0xac,0xf1,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x07,0x00,0x00
-
-# GFX10: image_sample_c_d_o v0, [v0, v1, v2, v3, v4, v5, v6, v8], s[0:7], s[8:11] dmask:0x4 dim:SQ_RSRC_IMG_2D_ARRAY a16 ; encoding: [0x2c,0x04,0xe8,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00]
-0x2c,0x04,0xe8,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00
-
-# GFX10: image_sample_c_d_o v[0:1], [v0, v1, v2, v3, v4, v5, v6, v8], s[0:7], s[8:11] dmask:0x6 dim:SQ_RSRC_IMG_2D_ARRAY a16 ; encoding: [0x2c,0x06,0xe8,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00]
-0x2c,0x06,0xe8,0xf0,0x00,0x00,0x40,0x40,0x01,0x02,0x03,0x04,0x05,0x06,0x08,0x00
-
-# GFX10: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00]
-0x01,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00
-
-# GFX10: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x00]
-0x0b,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x00
-
-# GFX10: image_sample_d_g16 v[0:3], [v0, v2, v3, v5, v6, v7, v8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D ; encoding: [0x15,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x03,0x05,0x06,0x07,0x08,0x00,0x00]
-0x15,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x03,0x05,0x06,0x07,0x08,0x00,0x00
-
-# GFX10: image_sample_c_d_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x00]
-0x01,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x00
-
-# GFX10: image_sample_c_d_g16 v[0:3], [v0, v1, v3, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06]
-0x0b,0x0f,0xa8,0xf0,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06
-
-# GFX10: image_sample_d_cl_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x00]
-0x01,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x00
-
-# GFX10: image_sample_d_cl_g16 v[0:3], [v0, v2, v4, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x06]
-0x0b,0x0f,0x8c,0xf0,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x06
-
-# GFX10: image_sample_c_d_cl_g16 v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xac,0xf0,0x00,0x00,0x40,0x00]
-0x01,0x0f,0xac,0xf0,0x00,0x00,0x40,0x00
-
-# GFX10: image_sample_c_d_cl_g16 v[0:3], [v0, v1, v3, v5, v6, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0d,0x0f,0xac,0xf0,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06,0x07,0x00,0x00,0x00]
-0x0d,0x0f,0xac,0xf0,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06,0x07,0x00,0x00,0x00
-
-# GFX10: image_sample_cd_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x00]
-0x01,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x00
-
-# GFX10: image_sample_cd_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x00]
-0x0b,0x0f,0xa0,0xf1,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x00
-
-# GFX10: image_sample_c_cd_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x00]
-0x01,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x00
-
-# GFX10: image_sample_c_cd_g16 v[0:3], [v0, v1, v3, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06]
-0x0b,0x0f,0xa8,0xf1,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06
-
-# GFX10: image_sample_cd_cl_g16 v[0:3], v[0:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x00]
-0x01,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x00
-
-# GFX10: image_sample_cd_cl_g16 v[0:3], [v0, v2, v4, v5, v6], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x06]
-0x0b,0x0f,0xa4,0xf1,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x06
-
-# GFX10: image_sample_c_cd_cl_g16 v[0:3], v[0:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0xac,0xf1,0x00,0x00,0x40,0x00]
-0x01,0x0f,0xac,0xf1,0x00,0x00,0x40,0x00
-
-# GFX10: image_sample_c_cd_cl_g16 v[0:3], [v0, v1, v3, v5, v6, v7], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0d,0x0f,0xac,0xf1,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06,0x07,0x00,0x00,0x00]
-0x0d,0x0f,0xac,0xf1,0x00,0x00,0x40,0x00,0x01,0x03,0x05,0x06,0x07,0x00,0x00,0x00
-
-# GFX10: image_sample_c_d_o_g16 v0, [v0, v1, v2, v4, v6, v7, v8], s[0:7], s[8:11] dmask:0x4 dim:SQ_RSRC_IMG_2D_ARRAY ; encoding: [0x2d,0x04,0xe8,0xf0,0x00,0x00,0x40,0x00,0x01,0x02,0x04,0x06,0x07,0x08,0x00,0x00]
-0x2d,0x04,0xe8,0xf0,0x00,0x00,0x40,0x00,0x01,0x02,0x04,0x06,0x07,0x08,0x00,0x00
-
-# GFX10: image_sample_c_d_o_g16 v[0:1], [v0, v1, v2, v4, v6, v7, v8], s[0:7], s[8:11] dmask:0x6 dim:SQ_RSRC_IMG_2D_ARRAY ; encoding: [0x2d,0x06,0xe8,0xf0,0x00,0x00,0x40,0x00,0x01,0x02,0x04,0x06,0x07,0x08,0x00,0x00]
-0x2d,0x06,0xe8,0xf0,0x00,0x00,0x40,0x00,0x01,0x02,0x04,0x06,0x07,0x08,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx10.txt b/llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx10.txt
deleted file mode 100644
index 65f65dac7ae55..0000000000000
--- a/llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx10.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck %s
-
-# CHECK: buffer_atomic_fcmpswap v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0xf8,0xe0,0x00,0x05,0x02,0x03]
-0xff,0x0f,0xf8,0xe0,0x00,0x05,0x02,0x03
-
-# CHECK: buffer_atomic_fcmpswap v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0xf8,0xe0,0x00,0xfe,0x02,0x03]
-0xff,0x0f,0xf8,0xe0,0x00,0xfe,0x02,0x03
-
-# CHECK: buffer_atomic_fcmpswap_x2 v[5:8], off, s[8:11], s3 offset:7 ; encoding: [0x07,0x00,0x78,0xe1,0x00,0x05,0x02,0x03]
-0x07,0x00,0x78,0xe1,0x00,0x05,0x02,0x03
-
-# CHECK: buffer_atomic_fcmpswap_x2 v[5:8], off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x78,0xe1,0x00,0x05,0x02,0x03]
-0xff,0x4f,0x78,0xe1,0x00,0x05,0x02,0x03
-
-# CHECK: buffer_atomic_fmax v5, v0, s[8:11], s3 idxen offset:4095 ; encoding: [0xff,0x2f,0x00,0xe1,0x00,0x05,0x02,0x03]
-0xff,0x2f,0x00,0xe1,0x00,0x05,0x02,0x03
-
-# CHECK: buffer_atomic_fmax_x2 v[5:6], off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x80,0xe1,0x00,0x05,0x02,0x03]
-0xff,0x4f,0x80,0xe1,0x00,0x05,0x02,0x03
-
-# CHECK: buffer_atomic_fmax_x2 v[5:6], off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x80,0xe1,0x00,0x05,0x42,0x03]
-0xff,0x0f,0x80,0xe1,0x00,0x05,0x42,0x03
-
-# CHECK: buffer_atomic_fmin v5, off, s[8:11], s3 ; encoding: [0x00,0x00,0xfc,0xe0,0x00,0x05,0x02,0x03]
-0x00,0x00,0xfc,0xe0,0x00,0x05,0x02,0x03
-
-# CHECK: buffer_atomic_fmin v5, off, s[8:11], s3 offset:7 ; encoding: [0x07,0x00,0xfc,0xe0,0x00,0x05,0x02,0x03]
-0x07,0x00,0xfc,0xe0,0x00,0x05,0x02,0x03
-
-# CHECK: buffer_atomic_fmin_x2 v[5:6], off, ttmp[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x7c,0xe1,0x00,0x05,0x1e,0x03]
-0xff,0x0f,0x7c,0xe1,0x00,0x05,0x1e,0x03
diff --git a/llvm/test/MC/Disassembler/AMDGPU/sop2_gfx10.txt b/llvm/test/MC/Disassembler/AMDGPU/sop2_gfx10.txt
deleted file mode 100644
index adeb47aa9d4d6..0000000000000
--- a/llvm/test/MC/Disassembler/AMDGPU/sop2_gfx10.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX10
-
-# GFX10: s_ashr_i64 s[0:1], null, s0 ; encoding: [0x7d,0x00,0x80,0x91]
-0x7d,0x00,0x80,0x91
-
-# GFX10: s_and_b64 s[0:1], null, null ; encoding: [0x7d,0x7d,0x80,0x87]
-0x7d,0x7d,0x80,0x87
diff --git a/llvm/test/MC/Disassembler/AMDGPU/vcmp-gfx10.txt b/llvm/test/MC/Disassembler/AMDGPU/vcmp-gfx10.txt
deleted file mode 100644
index 1875db2ccfed3..0000000000000
--- a/llvm/test/MC/Disassembler/AMDGPU/vcmp-gfx10.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=W32 %s
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=W64 %s
-
-# W32: v_cmp_class_f16_sdwa ttmp14, v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x1e,0x7d,0x01,0xfa,0x06,0x06]
-# W64: v_cmp_class_f16_sdwa ttmp[14:15], v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x1e,0x7d,0x01,0xfa,0x06,0x06]
-0xf9,0x04,0x1e,0x7d,0x01,0xfa,0x06,0x06
diff --git a/llvm/test/MC/Disassembler/AMDGPU/vcmpx-gfx10.txt b/llvm/test/MC/Disassembler/AMDGPU/vcmpx-gfx10.txt
deleted file mode 100644
index f15951eb4d08b..0000000000000
--- a/llvm/test/MC/Disassembler/AMDGPU/vcmpx-gfx10.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX10 %s
-
-#===------------------------------------------------------------------------===#
-# Regular v_cmpx encoding
-#===------------------------------------------------------------------------===#
-
-# GFX10: v_cmpx_eq_f16_e64 s1, v2
-0x00,0x00,0xda,0xd4,0x01,0x04,0x02,0x00
-
-# GFX10: v_cmpx_class_f32_e64 v0, 1
-0x00,0x00,0x98,0xd4,0x00,0x03,0x01,0x00
-
-# GFX10: v_cmpx_eq_f16_sdwa -v1, v2 src0_sel:DWORD src1_sel:DWORD
-0xf9,0x04,0xb4,0x7d,0x01,0x00,0x16,0x06
-
-# GFX10: v_cmpx_class_f32_sdwa v0, 1 src0_sel:WORD_1 src1_sel:DWORD
-0xf9,0x02,0x31,0x7d,0x00,0x00,0x05,0x86
-
-#===------------------------------------------------------------------------===#
-# v_cmpx with arbitrary DST value should also be decodable
-#===------------------------------------------------------------------------===#
-
-# GFX10: v_cmpx_eq_f16_e64 s1, v2
-0x7e,0x00,0xda,0xd4,0x01,0x04,0x02,0x00
-
-# GFX10: v_cmpx_class_f32_e64 v0, 1
-0x7e,0x00,0x98,0xd4,0x00,0x03,0x01,0x00
-
-# GFX10: v_cmpx_eq_f16_sdwa -v1, v2 src0_sel:DWORD src1_sel:DWORD
-0xf9,0x04,0xb4,0x7d,0x01,0x7e,0x16,0x06
-
-# GFX10: v_cmpx_class_f32_sdwa v0, 1 src0_sel:WORD_1 src1_sel:DWORD
-0xf9,0x02,0x31,0x7d,0x00,0x7e,0x05,0x86
-
-# GFX10: v_cmpx_class_f32_sdwa v0, 1 src0_sel:WORD_1 src1_sel:DWORD
-0xf9,0x02,0x31,0x7d,0x00,0x7d,0x05,0x86
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