[PATCH] D131959: [AMDGPU] Fix SDST operand of V_DIV_SCALE to always be VCC

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh requested review of this revision.
Pierre-vh added a comment.

I'll need some help in review. I think the VCC encoding is correct, but it should be expressed differently (perhaps by using the HWEncoding first 7 bits?)
For the wave32 test/having different asm depending on wave32/64 I'm not sure how to do that, this is where I'm stuck currently.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D131959/new/

https://reviews.llvm.org/D131959