[PATCH] D131841: [RISCV] Merge vmerge.vvm and unmasked intrinsic with VLMAX vector length.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 18 13:10:00 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2700
SDNode *Result =
CurDAG->getMachineNode(MaskedOpc, DL, True->getVTList(), Ops);
----------------
We also should be copying the NoFPExcept flag here. Can probably just take the SDNodeFlags from the True node.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D131841/new/
https://reviews.llvm.org/D131841
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