[PATCH] D131867: [AVR] Do not emit instructions invalid for attiny10

Mon Aug 15 02:13:23 PDT 2022

benshi001 added a comment.

More suggestions

1. Change the title to `[AVR] Avoid emitting instructions invalid on avrtiny devices`

2. Simplify the commit message to

  The attiny4/attiny5/attiny9/attiny10 have a slightly modified instruction set that drops a number of useful instructions. This patch makes sure to not emit them on these "reduced tiny" cores.

  The affected instructions are:

  lds and sts (load/store directly from data)
  ldd and std (load/store with displacement)
  adiw and sbiw (add/sub register pairs)

3. Append `Updates https://github.com/llvm/llvm-project/issues/53459` at the end of your commit message.

4. When you committing, report the commit link to https://github.com/llvm/llvm-project/issues/53459 .

5. Mention TODOs in https://github.com/llvm/llvm-project/issues/53459 , as you pointed

  There is a variant on lds and sts on these chips, but it can only address a limited portion of the address space and is mainly useful to load/store I/O registers (as an extension to the in and out instructions). I have not implemented it here, implementing it can be done in a separate patch.

  This patch is not optimal. I'm sure it can be improved a lot. For example, we could teach the instruction selector to not select lddw/stdw instructions so that the weird pointer adjustments are not necessary. But for now I've focused just on correctness, not on code quality.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131867/new/

https://reviews.llvm.org/D131867