[llvm] 3dba35b - [X86] Add test coverage for shl nsw with freeze
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 14 05:43:43 PDT 2022
Author: Simon Pilgrim
Date: 2022-08-14T13:42:35+01:00
New Revision: 3dba35b62bfcbbd11cfef8ccfb5dfabf3b5e3fdb
URL: https://github.com/llvm/llvm-project/commit/3dba35b62bfcbbd11cfef8ccfb5dfabf3b5e3fdb
DIFF: https://github.com/llvm/llvm-project/commit/3dba35b62bfcbbd11cfef8ccfb5dfabf3b5e3fdb.diff
LOG: [X86] Add test coverage for shl nsw with freeze
Added:
Modified:
llvm/test/CodeGen/X86/freeze-binary.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/freeze-binary.ll b/llvm/test/CodeGen/X86/freeze-binary.ll
index 9f83976cfe79..24da88ea596e 100644
--- a/llvm/test/CodeGen/X86/freeze-binary.ll
+++ b/llvm/test/CodeGen/X86/freeze-binary.ll
@@ -342,6 +342,26 @@ define i32 @freeze_shl(i32 %a0) nounwind {
ret i32 %z
}
+define i32 @freeze_shl_nsw(i32 %a0) nounwind {
+; X86-LABEL: freeze_shl_nsw:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shll $3, %eax
+; X86-NEXT: shll $5, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: freeze_shl_nsw:
+; X64: # %bb.0:
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: leal (,%rdi,8), %eax
+; X64-NEXT: shll $5, %eax
+; X64-NEXT: retq
+ %x = shl nsw i32 %a0, 3
+ %y = freeze i32 %x
+ %z = shl i32 %y, 5
+ ret i32 %z
+}
+
define i32 @freeze_shl_outofrange(i32 %a0) nounwind {
; X86-LABEL: freeze_shl_outofrange:
; X86: # %bb.0:
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