[llvm] 60534b8 - [DAG] canCreateUndefOrPoison - add freeze(add/sub/mul(x,y)) -> add/sub/mul(freeze(x),y,z) support
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 13 12:58:18 PDT 2022
Author: Simon Pilgrim
Date: 2022-08-13T20:58:00+01:00
New Revision: 60534b8879b17dc6925aba9ae3d138db0c8c2655
URL: https://github.com/llvm/llvm-project/commit/60534b8879b17dc6925aba9ae3d138db0c8c2655
DIFF: https://github.com/llvm/llvm-project/commit/60534b8879b17dc6925aba9ae3d138db0c8c2655.diff
LOG: [DAG] canCreateUndefOrPoison - add freeze(add/sub/mul(x,y)) -> add/sub/mul(freeze(x),y,z) support
These are guaranteed not to create undef/poison as long as there are no poison generating flags
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/X86/freeze-binary.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 11bde5bff832f..9741ace08c0d5 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -13927,7 +13927,8 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
// conditions 1) one-use, 2) does not produce poison, and 3) has all but one
// guaranteed-non-poison operands then push the freeze through to the one
// operand that is not guaranteed non-poison.
- if (!DAG.canCreateUndefOrPoison(N0, /*PoisonOnly*/ false) &&
+ if (!DAG.canCreateUndefOrPoison(N0, /*PoisonOnly*/ false,
+ /*ConsiderFlags*/ true) &&
N0->getNumValues() == 1 && N0->hasOneUse()) {
SDValue MaybePoisonOperand;
for (SDValue Op : N0->ops()) {
@@ -13944,6 +13945,7 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
}
if (MaybePoisonOperand) {
// Recreate the node with the frozen maybe-poison operand.
+ // TODO: Disable ConsiderFlags and just strip poison generating flags?
// TODO: Drop the isOnlyUserOf constraint and replace all users of
// MaybePoisonOperand with FrozenMaybePoisonOperand
// to match pushFreezeToPreventPoisonFromPropagating behavior.
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index e3e9914d1a5dc..16ef024ffa9a4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4575,6 +4575,13 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
case ISD::BITCAST:
return false;
+ case ISD::ADD:
+ case ISD::SUB:
+ case ISD::MUL:
+ // Matches hasPoisonGeneratingFlags().
+ return ConsiderFlags && (Op->getFlags().hasNoSignedWrap() ||
+ Op->getFlags().hasNoUnsignedWrap());
+
default:
// Allow the target to implement this method for its nodes.
if (Opcode >= ISD::BUILTIN_OP_END || Opcode == ISD::INTRINSIC_WO_CHAIN ||
diff --git a/llvm/test/CodeGen/X86/freeze-binary.ll b/llvm/test/CodeGen/X86/freeze-binary.ll
index 613a8320c6484..403423cd69f42 100644
--- a/llvm/test/CodeGen/X86/freeze-binary.ll
+++ b/llvm/test/CodeGen/X86/freeze-binary.ll
@@ -6,15 +6,13 @@ define i32 @freeze_add(i32 %a0) nounwind {
; X86-LABEL: freeze_add:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: incl %eax
-; X86-NEXT: incl %eax
+; X86-NEXT: addl $2, %eax
; X86-NEXT: retl
;
; X64-LABEL: freeze_add:
; X64: # %bb.0:
; X64-NEXT: # kill: def $edi killed $edi def $rdi
-; X64-NEXT: leal 1(%rdi), %eax
-; X64-NEXT: incl %eax
+; X64-NEXT: leal 2(%rdi), %eax
; X64-NEXT: retq
%x = add i32 %a0, 1
%y = freeze i32 %x
@@ -46,13 +44,12 @@ define <4 x i32> @freeze_add_vec(<4 x i32> %a0) nounwind {
; X86-LABEL: freeze_add_vec:
; X86: # %bb.0:
; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X86-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: freeze_add_vec:
; X64: # %bb.0:
-; X64-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
-; X64-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [5,5,5,5]
+; X64-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%x = add <4 x i32> %a0, <i32 1, i32 2, i32 3, i32 4>
%y = freeze <4 x i32> %x
@@ -82,15 +79,13 @@ define i32 @freeze_sub(i32 %a0) nounwind {
; X86-LABEL: freeze_sub:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: decl %eax
-; X86-NEXT: decl %eax
+; X86-NEXT: addl $-2, %eax
; X86-NEXT: retl
;
; X64-LABEL: freeze_sub:
; X64: # %bb.0:
; X64-NEXT: # kill: def $edi killed $edi def $rdi
-; X64-NEXT: leal -1(%rdi), %eax
-; X64-NEXT: decl %eax
+; X64-NEXT: leal -2(%rdi), %eax
; X64-NEXT: retq
%x = sub i32 %a0, 1
%y = freeze i32 %x
@@ -102,15 +97,13 @@ define i32 @freeze_sub_nuw(i32 %a0) nounwind {
; X86-LABEL: freeze_sub_nuw:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: decl %eax
-; X86-NEXT: decl %eax
+; X86-NEXT: addl $-2, %eax
; X86-NEXT: retl
;
; X64-LABEL: freeze_sub_nuw:
; X64: # %bb.0:
; X64-NEXT: # kill: def $edi killed $edi def $rdi
-; X64-NEXT: leal -1(%rdi), %eax
-; X64-NEXT: decl %eax
+; X64-NEXT: leal -2(%rdi), %eax
; X64-NEXT: retq
%x = sub nuw i32 %a0, 1
%y = freeze i32 %x
@@ -122,13 +115,12 @@ define <4 x i32> @freeze_sub_vec(<4 x i32> %a0) nounwind {
; X86-LABEL: freeze_sub_vec:
; X86: # %bb.0:
; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X86-NEXT: psubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: freeze_sub_vec:
; X64: # %bb.0:
-; X64-NEXT: vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
-; X64-NEXT: vpsubd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [5,5,5,5]
+; X64-NEXT: vpsubd %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%x = sub <4 x i32> %a0, <i32 1, i32 2, i32 3, i32 4>
%y = freeze <4 x i32> %x
@@ -158,15 +150,13 @@ define i32 @freeze_mul(i32 %a0) nounwind {
; X86-LABEL: freeze_mul:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: addl %eax, %eax
-; X86-NEXT: addl %eax, %eax
+; X86-NEXT: shll $2, %eax
; X86-NEXT: retl
;
; X64-LABEL: freeze_mul:
; X64: # %bb.0:
; X64-NEXT: # kill: def $edi killed $edi def $rdi
-; X64-NEXT: leal (%rdi,%rdi), %eax
-; X64-NEXT: addl %eax, %eax
+; X64-NEXT: leal (,%rdi,4), %eax
; X64-NEXT: retq
%x = mul i32 %a0, 2
%y = freeze i32 %x
@@ -198,13 +188,11 @@ define <8 x i16> @freeze_mul_vec(<8 x i16> %a0) nounwind {
; X86-LABEL: freeze_mul_vec:
; X86: # %bb.0:
; X86-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X86-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: freeze_mul_vec:
; X64: # %bb.0:
; X64-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
-; X64-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: retq
%x = mul <8 x i16> %a0, <i16 1, i16 2, i16 3, i16 4, i16 4, i16 3, i16 2, i16 1>
%y = freeze <8 x i16> %x
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