[PATCH] D131773: [AArch64] Add support for 256-bit non temporal loads

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:20391
+    if (LoadNode->isNonTemporal() && MemVT.getSizeInBits() == 256u &&
+        EC.isKnownEven() &&
+        ((MemVT.getScalarSizeInBits() == 8u ||
----------------
Why is EC.isKnownEven needed?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:20392
+        EC.isKnownEven() &&
+        ((MemVT.getScalarSizeInBits() == 8u ||
+          MemVT.getScalarSizeInBits() == 16u ||
----------------
This looks like it could drop a set of brackets.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131773/new/

https://reviews.llvm.org/D131773