[PATCH] D131819: [RISCV] Enable isTruncateFree in SDAG for i64->i32 on rv64.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1107
 // just be used.
+// FIXME: Should we consider i64->i32 free on RV64 to match the EVT version of
+// isTruncateFree?
----------------
jrtc27 wrote:
> Is there a reason they *shouldn't* match? Having them differ for simple types like i64->i32 is rather surprising.
Probably not. Just need to do more review of the callers and check the generated code. So I’d like to do it in a different patch.


================
Comment at: llvm/test/CodeGen/RISCV/trunc-free.ll:9
+
+define void @foo(i32* %p, i64* %q, i32* %r, i32 %x) {
+; CHECK-LABEL: foo:
----------------
jrtc27 wrote:
> %x is unused
Thanks. I went through a couple iterations.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131819/new/

https://reviews.llvm.org/D131819