[PATCH] D130769: [RISCV] Combine and remove redundant ADD/SUB instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVAddSubCombiner.cpp:118
+    MachineInstr *CurrentInstr = &*MBBI;
+    if (Opcode != CheckedInstr->getOpcode()) {
+      return false;
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Drop curly braces


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Comment at: llvm/lib/Target/RISCV/RISCVAddSubCombiner.cpp:129
+      if (ResultImm != 0) {
+        // Combine instructions to one.
+        DebugLoc DL = CheckedInstr->getDebugLoc();
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Can we update the immediate for MBBI instead of creating a new instruction?


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Comment at: llvm/lib/Target/RISCV/RISCVAddSubCombiner.cpp:168
+      auto RegisterUsageIter = ModificationRegisterMonitor.find(MBBI->getOperand(2).getReg());
+      if ( RegisterUsageIter != ModificationRegisterMonitor.end()) {
+        for (const auto &Users : RegisterUsageIter->second) {
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Extra space here


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130769/new/

https://reviews.llvm.org/D130769