[PATCH] D131700: [AArch64] Add pattern for SQDML*Lv1i32_indexed
OverMighty via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 11 11:32:51 PDT 2022
overmighty added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:8862
V128_lo:$Rm, VectorIndexH:$idx),
ssub)>;
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This matches the vqdmlalh_lane_s16, vqdmlalh_laneq_s16, vqdmlslh_lane_s16, and vqdmlslh_laneq_s16 ACLE functions when the lane is not 0.
I can simply remove this definition and the SQDML*Lv1i32_indexed instructions will be used, however it will result in longer AArch64 code (extra dup instruction).
Is this FIXME really an issue?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D131700/new/
https://reviews.llvm.org/D131700
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