[PATCH] D131503: [DAGCombine] Combine signext_inreg of extract-extend

[Peter Waller via Phabricator via llvm-commits]

peterwaller-arm updated this revision to Diff 451859.
peterwaller-arm added a comment.

- Rebase onto 898699831b54 <https://reviews.llvm.org/rG898699831b5490d88b993593e5cb415fb2d1983a>, which fixes the zero-extending case in visitAND.
  - A backport has been requested for this one in https://github.com/llvm/llvm-project/issues/57089.
- Use .getValueType().


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131503/new/

https://reviews.llvm.org/D131503

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/extract-subvec-combine.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
  llvm/test/CodeGen/AArch64/vector-fcvt.ll

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