[PATCH] D130769: [RISCV] Combine and remove redundant ADD/SUB instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVAddSubCombiner.cpp:188
+    erase_if(RegistersInfo.second, [&Reg](std::pair<Register, bool> Element) {
+                     [&Reg](std::pair<Register, bool> Element) {
+      return Element.first == Reg;
----------------
Something looks weird here. `[&Reg](std::pair<Register, bool> Element) {` is repeated


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130769/new/

https://reviews.llvm.org/D130769