[PATCH] D130769: [RISCV] Combine and remove redundant ADD/SUB instructions

[Elena Lepilkina via Phabricator via llvm-commits]

eklepilkina added a comment.

Need to mention that the number of optimized cases became much less after of rebasing on the new main and escaping combining  ADDI and ADDIW on 64-bit platform

  Tests: 2025
  Metric: riscv-addsub-comb.NumRemovedInstructions
  
  Program                                       riscv-addsub-comb.NumRemovedInstructions
                                                results                                 
  ultiSource...nchmarks/tramp3d-v4/tramp3d-v4    16.00                                  
  ultiSource/Applications/sqlite3/sqlite3        15.00                                  
  ultiSource/Applications/lemon/lemon             7.00                                  
  ultiSource...ch/office-ispell/office-ispell     7.00                                  
  ultiSource.../DOE-ProxyApps-C++/CLAMR/CLAMR     6.00                                  
  ultiSource...chmarks/Prolangs-C/agrep/agrep     6.00                                  
  ultiSource/Applications/ClamAV/clamscan         5.00                                  
  ultiSource...gs-C/TimberWolfMC/timberwolfmc     2.00                                  
  ultiSource...Prolangs-C/assembler/assembler     2.00                                  
  ultiSource/Applications/lua/lua                 1.00                                  
  ultiSource...Benchmarks/7zip/7zip-benchmark     1.00                                  
  ultiSource...omotive-susan/automotive-susan     1.00   


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130769/new/

https://reviews.llvm.org/D130769