[PATCH] D131343: [RISC-V][HWASAN] Add support for HWASAN code instrumentation for RISC-V
Vitaly Buka via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 9 17:57:34 PDT 2022
vitalybuka added a comment.
Please split RISCVAsmParser/Printer and HWAddressSanitizer into separate patches
================
Comment at: llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp:17
#include "MCTargetDesc/RISCVTargetStreamer.h"
#include "RISCV.h"
#include "RISCVTargetMachine.h"
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If we change RISCVAsmPrinter, I assume we need to update RISCVAsmParser.cpp and add corresponding tests
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Comment at: llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp:919
break;
+ case Triple::riscv64:
+ // The signal handler will find the data address in x10.
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we need a few new tests for instumentation
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D131343/new/
https://reviews.llvm.org/D131343
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