[PATCH] D129037: [globalisel] Select register bank for DBG_VALUE

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

LGTM, although this leaves AMDGPU and all other targets broken. I'm going to file a GitHub issue for this



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Comment at: llvm/lib/CodeGen/RegisterBankInfo.cpp:452-454
+    LLT Ty = MRI.getType(MO.getReg());
+    if (!Ty.isValid())
+      continue;
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I almost think debug instrs shouldn't go through applyDefaultMapping but maybe it is easier this way


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Comment at: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp:910
 
+static bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI,
+                             const RegisterBankInfo &RBI) {
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This should really go to generic code, but I won't insist on you doing that in this patch. We still need a better generic API for constraining. Can you add a fix to move this?


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Comment at: llvm/lib/Target/X86/X86InstructionSelector.cpp:235-237
+                                              MachineRegisterInfo &MRI) const {
+  for (MachineOperand &MO : I.operands()) {
+    if (!MO.isReg())
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Same, should get a fixme


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D129037/new/

https://reviews.llvm.org/D129037