[llvm] dbff03b - [X86] Add test case to recombine LEA from OR.

Amaury Séchet via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 7 09:20:11 PDT 2022


Author: Amaury Séchet
Date: 2022-08-07T16:19:53Z
New Revision: dbff03b85840592fcfc97d1a10d4fad5f70e6aee

URL: https://github.com/llvm/llvm-project/commit/dbff03b85840592fcfc97d1a10d4fad5f70e6aee
DIFF: https://github.com/llvm/llvm-project/commit/dbff03b85840592fcfc97d1a10d4fad5f70e6aee.diff

LOG: [X86] Add test case to recombine LEA from OR.

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/or-lea.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/or-lea.ll b/llvm/test/CodeGen/X86/or-lea.ll
index 9ea15ee72cf9..8cc1a45f3cd2 100644
--- a/llvm/test/CodeGen/X86/or-lea.ll
+++ b/llvm/test/CodeGen/X86/or-lea.ll
@@ -333,3 +333,94 @@ entry:
   %inc = add i64 %or, 1
   ret i64 %inc
 }
+
+define i32 @or_sext1(i32 %x) {
+; CHECK-LABEL: or_sext1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $1, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 1
+  ret i32 %or
+}
+
+define i32 @or_sext2(i32 %x) {
+; CHECK-LABEL: or_sext2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $2, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 2
+  ret i32 %or
+}
+
+define i32 @or_sext3(i32 %x) {
+; CHECK-LABEL: or_sext3:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $3, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 3
+  ret i32 %or
+}
+
+define i32 @or_sext4(i32 %x) {
+; CHECK-LABEL: or_sext4:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $4, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 4
+  ret i32 %or
+}
+
+define i32 @or_sext7(i32 %x) {
+; CHECK-LABEL: or_sext7:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $7, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 7
+  ret i32 %or
+}
+
+define i32 @or_sext8(i32 %x) {
+; CHECK-LABEL: or_sext8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    cmpl $43, %edi
+; CHECK-NEXT:    setge %al
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $8, %eax
+; CHECK-NEXT:    retq
+  %cmp = icmp sgt i32 %x, 42
+  %sext = sext i1 %cmp to i32
+  %or = or i32 %sext, 8
+  ret i32 %or
+}
+


        


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