[PATCH] D131356: [InstCombine] reassociate bitwise logic chains based on uses

[Sanjay Patel via Phabricator via llvm-commits]

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(X op Y) op Z --> (Y op Z) op X

This isn't a complete solution (see TODO tests for possible refinements), but it shows some nice wins and doesn't seem to cause any harm. I think the most potential danger is from conflicting with other folds and causing an infinite loop - that's the reason for avoiding patterns with constant operands.

Alternatively, we could try this in the `reassociate` pass, but we would not immediately see all of the logic folds that `instcombine` provides. I also looked at improving ValueTracking's isImpliedCondition() (and we should still add some enhancements there), but that would not work in general for bitwise logic reduction.

The tests that reduce completly to 0/-1 are motivated by issue #56653 <https://github.com/llvm/llvm-project/issues/56653>.


https://reviews.llvm.org/D131356

Files:
  llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
  llvm/test/Transforms/InstCombine/and-or-icmps.ll
  llvm/test/Transforms/InstCombine/and-or-not.ll
  llvm/test/Transforms/InstCombine/and-or.ll
  llvm/test/Transforms/InstCombine/and-xor-or.ll
  llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
  llvm/test/Transforms/LoopVectorize/reduction-predselect.ll

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