[PATCH] D130560: [RISCV] Handle register spill in branch relaxation

[luxufan via Phabricator via llvm-commits]

StephenFan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:1075
   ScavSlotsNum = std::max(ScavSlotsNum, getScavSlotsNumForRVV(MF));
   for (unsigned i = 0; i < ScavSlotsNum; i++) {
+    int FI = MFI.CreateStackObject(RegInfo->getSpillSize(*RC),
----------------
Capitalize i


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:1080
+
+    if (IsLargeFunction && i == 0)
+      RVFI->setBranchRelaxationScratchFrameIndex(FI);
----------------
piggynl wrote:
> Do we need this `IsLargeFunction`?
I think we need.


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:1080
+
+    if (IsLargeFunction && i == 0)
+      RVFI->setBranchRelaxationScratchFrameIndex(FI);
----------------
StephenFan wrote:
> piggynl wrote:
> > Do we need this `IsLargeFunction`?
> I think we need.
Is this more readable?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D130560/new/

https://reviews.llvm.org/D130560