[PATCH] D131253: [AArch64] Add bf16 select handling

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: simon_tatham, stuij, samtebbs, SjoerdMeijer.
Herald added subscribers: hiraditya, kristof.beyls.
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dmgreen requested review of this revision.
Herald added a project: LLVM.

A bfloat select operation will currently crash, but is allowed from C. This adds handling for the operation, turning it into a FCSELHrrr if fullfp16 is present, or converting it to a FCSELSrrr if not. The FCSELSrrr is created via using INSERT_SUBREG/EXTRACT_SUBREG to convert the bf16 to a f32 and using the f32 pattern for FCSELSrrr. (I originally attempted to do this via a tablegen pattern, but it appears that the nzcv glue is places onto the wrong node, causing it to be forgotten and incorrect scheduling to be emitted).

The FCSELSrrr can also be used for fp16 selects when +fullfp16 is not present, which helps avoid an unnecessary promotion to f32.


https://reviews.llvm.org/D131253

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/arm64-fmax.ll
  llvm/test/CodeGen/AArch64/bf16-select.ll
  llvm/test/CodeGen/AArch64/f16-instructions.ll

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