[PATCH] D131047: [AArch64] Add a tablegen pattern for aarch64.neon.pmull64

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

The problem with tablegen patterns that produce multiple values is that they don't allow the other nodes to combine as they naturally should. For example in this case a `dup(load` could be a `ld1r`. And I'm pretty sure a `dup v1, x1` should be better than a 'fmov;dup' pair.

There is some code that already handles dup of other mull instructions, including pmull in tryCombineLongOpWithDup. It doesn't look like it gets called for a pmull64 though, could it be used here?


Repository:
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  https://reviews.llvm.org/D131047/new/

https://reviews.llvm.org/D131047